Performance comparison between tapped-inductor buck converter and ultrahigh step-down converter

2017 ◽  
Vol 5 (4) ◽  
pp. 475-490 ◽  
Author(s):  
K. I. Hwu ◽  
W. Z. Jiang
Author(s):  
Deekshitha S. Nayak ◽  
R. Shivarudraswamy

In large and small scale applications, different kinds of variable speed driving systems can be found. For saving the energy consumption of these devices, eco-friendly electronics are used, which lead to the development of the Brushless DC motor (BLDC). Its higher power density, higher efficiency, higher torque at low speed, and low maintenance enhances the use of a BLDC motor. The existing mixer grinder consists of the universal motor, which operates in alternating current supply due to high starting torque characteristics and simple controlling of the speed. The absence of brushes and the reduction of noise in the BLDC extends its life and makes it ideal in a mixer grinder. A solar-powered BLDC motor drive for a mixer grinder is presented in this paper. A DC-DC buck converter is utilized to operate the PV (photovoltaic) array at its maximum power. The proposed hysteresis current control BLDC system has been developed in the MATLAB. The commercially available mixer grinder is presented along with the proposed simulated system for performance comparison. It can be concluded that at the no load condition, the efficiency of the experimental existing mixer grinder is 51.03% and simulated proposed system is 81.25% and at load condition, the efficiency of the experimental mixer grinder is 49.32% and simulated system is 79.85%.


Energies ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 1131 ◽  
Author(s):  
Mauricio Dalla Vecchia ◽  
Giel Van den Broeck ◽  
Simon Ravyts ◽  
Johan Driesen

This paper explores and presents the application of the Inductor–Diode and Inductor-Capacitor-Diode structures in a DC–DC step-down configuration for systems that require voltage adjustments. DC micro/picogrids are becoming more popular nowadays and the study of power electronics converters to supply the load demand in different voltage levels is required. Multiple strategies to step-down voltages are proposed based on different approaches, e.g., high-frequency transformer and voltage multiplier/divider cells. The key question that motivates the research is the investigation of the aforementioned Inductor–Diode and Inductor–Capacitor–Diode, current multiplier/divider cells, in a step-down application. The two-stage buck converter is used as a study case to achieve the output voltage required. To extend the intermediate voltage level flexibility in the two-stage buck converter, a second switch was implemented replacing a diode, which gives an extra degree-of-freedom for the topology. Based on this modification, three regions of operation are theoretically defined, depending on the operational duty cycles δ2 and δ1 of switches S2 and S1. The intermediate and output voltage levels are defined based on the choice of the region of operation and are mapped herein, summarizing the possible voltage levels achieved by each configuration. The paper presents the theoretical analysis, simulation, implementation and experimental validation of a converter with the following specifications; 48 V/12 V input-to-output voltage, different intermediate voltage levels, 100 W power rating, and switching frequency of 300 kHz. Comparisons between mathematical, simulation, and experimental results are made with the objective of validating the statements herein introduced.


Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 412 ◽  
Author(s):  
Ghulam Abbas ◽  
Jason Gu ◽  
Umar Farooq ◽  
Muhammad Abid ◽  
Ali Raza ◽  
...  

In this paper, a nonlinear least squares optimization method is employed to optimize the performance of pole-zero-cancellation (PZC)-based digital controllers applied to a switching converter. An extensively used step-down converter operating at 1000 kHz is considered as a plant. In the PZC technique, the adverse effect of the (unwanted) poles of the buck converter power stage is diminished by the complex or real zeros of the compensator. Various combinations of the placement of the compensator zeros and poles can be considered. The compensator zeros and poles are nominally/roughly placed while attempting to cancel the converter poles. Although PZC techniques exhibit satisfactory performance to some extent, there is still room for improvement of the controller performance by readjusting its poles and zeros. The (nominal) digital controller coefficients thus obtained through PZC techniques are retuned intelligently through a nonlinear least squares (NLS) method using the Levenberg-Marquardt (LM) algorithm to ameliorate the static and dynamic performance while minimizing the sum of squares of the error in a quicker way. Effects of nonlinear components such as delay, ADC/DAC quantization error, and so forth contained in the digital control loop on performance and loop stability are also investigated. In order to validate the effectiveness of the optimized PZC techniques and show their supremacy over the traditional PZC techniques and the ones optimized by genetic algorithms (GAs), simulation results based on a MATLAB/Simulink environment are provided. For experimental validation, rapid hardware-in-the-loop (HiL) implementation of the compensated buck converter system is also performed.


2019 ◽  
Vol 12 (12) ◽  
pp. 3306-3314 ◽  
Author(s):  
Mauricio Dalla Vecchia ◽  
Giel Van den Broeck ◽  
Simon Ravyts ◽  
Jeroen Tant ◽  
Johan Driesen

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