Development of Pulsar Digital Backend Based on RFSoC

Abstract Radio Frequency System on Chip (RFSoC) offers great potential for implementing a complete next generation signal processing system on a single board for radio astronomy. We designed a pulsar digital backend system based on ZCU111 board. The system uses RFSoC technology to implement digitization, channelization, correlation and high-speed data transmission in the Xilinx ZU28DR device. We have evaluated the performance of the 12-bit, 8 RF-ADCs, which are integrated in RFSoC, with the maximum sampling rate of 4.096 GSPS. The RF-ADC sampling frequency, channel bandwidth and the time resolution can be configured dynamically in our designed system. To verify the system performance, we deployed the RFSoC board on the Nanshan 26-meter radio telescope and observed the pulsar signal with a frequency resolution of 1 MHz and time resolution of 64 us. In the observation test, we obtained pulsar profiles with high signal-to-noise ratio and accurately searched the DM values. The experiment results show that, the performance of RF-ADCs, FPGA and CPU cores in RFSoC is sufficient for radio astronomy signal processing applications.

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Design of Virtex-7 FPGA-Based High-Speed Signal Processor Carrier Board

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.719-720.534 ◽

2015 ◽

Vol 719-720 ◽

pp. 534-537

Author(s):

Wen Hua Ye ◽

Huan Li

Keyword(s):

Signal Processing ◽

Digital Signal Processing ◽

High Speed ◽

Processing System ◽

Digital Signal ◽

Signal Processing System ◽

High Speed Adc ◽

High Speed Data ◽

Processor Speed ◽

Signal Processor

With the development of digital signal processing technology, the demand on the signal processor speed has become increasingly high. This paper describes the hardware design of carrier board in high-speed signal processing module, which using Xilinx's newest Virtex-7 FPGA family XC7VX485T chip, and applying high-speed signal processing interface FMC to transport and communicate high-speed data between carrier board and daughter card with high-speed ADC and DAC. This design provides a hardware implementation and algorithm verification platform for high-speed digital signal processing system.

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A High-Performance Signal Processing System for Monopulse Tracking Radar

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.383-390.471 ◽

2011 ◽

Vol 383-390 ◽

pp. 471-475

Author(s):

Yong Bin Hong ◽

Cheng Fa Xu ◽

Mei Guo Gao ◽

Li Zhi Zhao

Keyword(s):

Signal Processing ◽

High Performance ◽

Dynamic Range ◽

Signal To Noise Ratio ◽

Processing System ◽

Digital Signal ◽

Radar Signal ◽

Signal Processing System ◽

Parallel Pipelined ◽

Tracking Radar

A radar signal processing system characterizing high instantaneous dynamic range and low system latency is designed based on a specifically developed signal processing platform. Instantaneous dynamic range loss is a critical problem when digital signal processing is performed on fixed-point FPGAs. In this paper, the problem is well resolved by increasing the wordlength according to signal-to-noise ratio (SNR) gain of the algorithms through the data path. The distinctive software structure featuring parallel pipelined processing and “data flow drive” reduces the system latency to one coherent processing interval (CPI), which significantly improves the maximum tracking angular velocity of the monopulse tracking radar. Additionally, some important electronic counter-countermeasures (ECCM) are incorporated into this signal processing system.

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