scholarly journals Low Temperature Characterization of Hole Mobility in Sub-14nm Gate Length Si0.7Ge0.3 Tri-Gate pMOSFETs

2017 ◽  
Vol 834 ◽  
pp. 012001
Author(s):  
R. Laviéville ◽  
C. Le Royer ◽  
S. Barraud ◽  
G. Ghibaudo
Keyword(s):  
Low Temperature ◽  
Hole Mobility ◽  
Gate Length

DC Characterization of Different Advanced MOSFET Architectures

2011 ◽  
Vol 324 ◽  
pp. 407-410 ◽  
Author(s):  
Jalal Jomaah ◽  
Majida Fadlallah ◽  
Gerard Ghibaudo
Keyword(s):  
Low Temperature ◽  
Parameter Extraction ◽  
Gate Length ◽  
Double Gate ◽  
Extraction Techniques ◽  
Interaction Mechanisms ◽  
Dc Characterization

A review of recent results concerning the DC characterization of FD- and Double Gate SOI MOSFET’s and FinFETs in modern CMOS technologies is given. By proper extraction techniques, distinction between the different interaction mechanisms is done. Parameter extraction conducted at room and low temperature clearly indicates that the mobility is directly impacted by shrinking the gate length in sub 100nm architectures.

Growth and Characterization of Ge1-xSnx Layers for High Mobility Tensile-Strained Ge Channels of CMOS Devices

2010 ◽  
Vol 654-656 ◽  
pp. 1788-1791
Author(s):  
Osamu Nakatsuka ◽  
Yosuke Shimura ◽  
Shotaro Takeuchi ◽  
Noramasa Tsutsui ◽  
Shigeaki Zaima
Keyword(s):  
Low Temperature ◽  
Strain Relaxation ◽  
High Mobility ◽  
Hole Mobility ◽  
Misfit Strain ◽  
Misfit Dislocations ◽  
Temperature Growth ◽  
Vacancy Defects ◽  
Si Substrates

We have investigated the growth and characteristics of heteroepitaxial Ge1-xSnx layers on various substrates. The low temperature growth and the large misfit strain between Ge1-xSnx and Si leads to the high density of defects such as vacancy in Ge1-xSnx layers. They effectively enhance the propagation of misfit dislocations and the strain relaxation with suppressing the precipitation of Sn atoms from Ge1-xSnx layers. We succeeded in growing strain-relaxed Ge1-xSnx layers with a Sn content over 9% by controlling the dislocation structure on Si substrates. We also characterized the Hall mobility of Ge1-xSnx layers and found that the incorporation of Sn into Ge effectively reduced the concentration of holes related with vacancy defects, and improved on the hole mobility.

Experimental technology and characterization of self-aligned 0.1µm-gate-length low-temperature operation NMOS devices

1987 ◽  
Author(s):  
G.A. Sai-Halasz ◽  
M.R. Wordeman ◽  
D.P. Kern ◽  
E. Ganin ◽  
S. Rishton ◽  
...  
Keyword(s):  
Low Temperature ◽  
Gate Length ◽  
Experimental Technology

Characterization of Low Temperature SiNx Films for 3D/2.5D-IC TSV

2015 ◽  
Vol 135 (7) ◽  
pp. 733-738 ◽  
Author(s):  
Yasushi Kobayashi ◽  
Yoshihiro Nakata ◽  
Tomoji Nakamura ◽  
Mayumi B. Takeyama ◽  
Masaru Sato ◽  
...  
Keyword(s):  
Low Temperature

Low temperature acoustic characterization of PMN single crystal

2017 ◽  
Vol 122 (8) ◽  
pp. 084103 ◽  
Author(s):  
E. Smirnova ◽  
A. Sotnikov ◽  
S. Ktitorov ◽  
H. Schmidt
Keyword(s):  
Low Temperature ◽  
Single Crystal ◽  
Acoustic Characterization
Sign in / Sign up

Export Citation Format

Share Document