scholarly journals Research and Design of a simple CPU with Quartus II

2019 ◽  
Vol 252 ◽  
pp. 032180
Author(s):  
Bo Liu
Keyword(s):  
Quartus Ii ◽  
Research And Design

Research and Design of Asynchronous FIFO Based on FPGA

2014 ◽  
Vol 644-650 ◽  
pp. 3440-3444
Author(s):  
Bing Qi Liu ◽  
Ming Zhe Liu ◽  
Gang Yang ◽  
Xiao Bo Mao ◽  
Huai Liang Li
Keyword(s):  
Design Method ◽  
Stable State ◽  
Gray Code ◽  
Validity And Reliability ◽  
Verilog Hdl ◽  
Simulation Test ◽  
Development Platform ◽  
Module Design ◽  
Quartus Ii ◽  
Research And Design

In this article, a design method of asynchronous FIFO memory based on FPGA is put forward. With FPGA as the core controller, We adopt Verilog HDL and top-down design method to build a top-level module design and also analyze the mark logic of asynchronous FIFO and the elimination of semi-stable state under Quartus II development platform. Besides, with the application of Gray code conversion technology, not only the reliable transmission of data is guaranteed but also design efficiency is improved. Through contrast experiment analysis and simulation test, the validity and reliability of asynchronous FIFO memory are verified, meeting the basic requirement that FIFO can hold more enough data without spillovers despite the fullness of data.

Research and Design of Beamforming Device of SLC-LSCMA Algorithm Based on FPGA

2013 ◽  
Vol 347-350 ◽  
pp. 1677-1681
Author(s):  
Qing Fang Zhou ◽  
Yan Yan Yu ◽  
Lei Wang ◽  
Jun Yang
Keyword(s):  
Least Squares ◽  
Satellite Communications ◽  
Clock Frequency ◽  
Verilog Hdl ◽  
Description Language ◽  
Quartus Ii ◽  
Hardware Description ◽  
Timing Simulation ◽  
Array Beamforming ◽  
Research And Design

In this paper,we design a uniform circular array beamforming device of 16 yuan based on the least squares SLC-LSCMA algorithm (based on the linear subspace constrained least squares cma) high stability and rapid convergence for the foundation. The design of the complete beam-forming the SLC-LSCMA algorithm by plural, time-multiplier and accumulators, which uses less resources and faster than the traditional algorithm. The beamforming device uses hardware description language of Verilog HDL , and wires on the QUARTUS II 8.0. Finally the beamforming device is downloaded to the Alteras EP2C35F672C6, and its timing simulation can be run properly in the 50MHz clock frequency. This design can be widely used in mobile communication and satellite communications.

The Research and Design of 915MHz Radio Frequency Reader Based on FPGA

2012 ◽  
Vol 462 ◽  
pp. 524-531
Author(s):  
Shi Lin Fang
Keyword(s):  
Radio Frequency ◽  
Digital Signal ◽  
Flexible Structure ◽  
Type B ◽  
Verilog Hdl ◽  
Rfid Reader ◽  
Quartus Ii ◽  
Cmos Chip ◽  
And Function ◽  
Research And Design

Based on ISO/IEC 18000-6 Type B protocol, 915MHz RFID reader has been designed. FPGA is used to process the digital signal that is based on the protocol and C8051F020 is used as the controller. Each module in FPGA and verification module is designed by Verilog HDL. They are synthesized by Quartus II with EP1C6Q240C8 CMOS chip of the Altera as the target device, and they are verified on both timing and function. The result shows that it could satisfy the technology index of ISO/IEC18000-6 Type B requests and possess the advantages of flexible structure, small size and easily upgrading, etc.

Attitudes towards Doing Research And Design Activities Questionnaire

2018 ◽  
Author(s):  
T. E. Vossen ◽  
I. Henze ◽  
R. C. A. Rippe ◽  
J. H. Van Driel ◽  
M. J. De Vries
Keyword(s):  
Design Activities ◽  
Research And Design

CONVEYOR MODEL AND IMPLEMENTATION OF THE REAL NUMBERS ADDER ON FPGA

2020 ◽  
Vol 33 (109) ◽  
pp. 21-31
Author(s):  
І. Ya. Zeleneva ◽  
Т. V. Golub ◽  
T. S. Diachuk ◽  
А. Ye. Didenko
Keyword(s):  
Performance Improvement ◽  
Experimental Studies ◽  
Production Costs ◽  
Floating Point ◽  
Computing Device ◽  
Quartus Ii ◽  
Functional Blocks ◽  
Mental Testing ◽  
Processor Cores ◽  
Floating Point Numbers

The purpose of these studies is to develop an effective structure and internal functional blocks of a digital computing device – an adder, that performs addition and subtraction operations on floating- point numbers presented in IEEE Std 754TM-2008 format. To improve the characteristics of the adder, the circuit uses conveying, that is, division into levels, each of which performs a specific action on numbers. This allows you to perform addition / subtraction operations on several numbers at the same time, which increas- es the performance of calculations, and also makes the adder suitable for use in modern synchronous cir- cuits. Each block of the conveyor structure of the adder on FPGA is synthesized as a separate project of a digital functional unit, and thus, the overall task is divided into separate subtasks, which facilitates experi- mental testing and phased debugging of the entire device. Experimental studies were performed using EDA Quartus II. The developed circuit was modeled on FPGAs of the Stratix III and Cyclone III family. An ana- logue of the developed circuit was a functionally similar device from Altera. A comparative analysis is made and reasoned conclusions are drawn that the performance improvement is achieved due to the conveyor structure of the adder. Implementation of arithmetic over the floating-point numbers on programmable logic integrated cir- cuits, in particular on FPGA, has such advantages as flexibility of use and low production costs, and also provides the opportunity to solve problems for which there are no ready-made solutions in the form of stand- ard devices presented on the market. The developed adder has a wide scope, since most modern computing devices need to process floating-point numbers. The proposed conveyor model of the adder is quite simple to implement on the FPGA and can be an alternative to using built-in multipliers and processor cores in cases where the complex functionality of these devices is redundant for a specific task.

Problems of Analysis of Design and Research Methods of Interaction with the Urban Environment

2020 ◽  
pp. 99-110
Author(s):  
П. В. Капустин ◽  
А. И. Гаврилов
Keyword(s):  
Urban Planning ◽  
Urban Environment ◽  
Urban Studies ◽  
Environmental Movement ◽  
The Past ◽  
Types Of Knowledge ◽  
Historical Dynamics ◽  
The 1960S ◽  
The City ◽  
Research And Design

Состояние проблемы. Проблематика городской среды заявила о себе в 1960-е годы как протест против модернистских методов урбанизма и других видов проектирования. Средовое движение не случайно тогда именовали «антипрофессиональным» - оно было направлено против устоявшихся и недейственных методов работы с городом - от исследования до управления. За прошедшие десятилетия в рамках самого средового движения и его идейных наследников наработано немало методов и приемов работы, однако они до сих не подвергались анализу как пребывающая в исторической динамике целостная совокупность инструментария, альтернативного традиционному градостроительству. Результаты. Рассмотрены особенности и проблемы анализа методологического «арсенала» средового движения и урбанистики. Методы работы с городской средой впервые структурированы по типам знания. Показана близость методов исследовательского и проектного подходов в отношении городской среды. Выводы. В ближайшее время можно ожидать появления новых синтетических знаний и частных методологий, связанных как с обострением средовой проблематики, с расширением круга средовых акторов, так и с процессом профессионализации урбанистики. Statement of the problem. The urban environment paradigm emerged in the 1960s as a protest against the modernist methods of urbanism and other types of design. It was no coincidence that the environmental movement was back then called "anti-professional" as it was directed against the established and ineffective methods of working with the city, i. e., from research to management. Over the past decades, within the framework of the environmental movement and its ideological heirs, a lot of methods and have been developed. However, they have not yet been analyzed as an integral set of tools in the historical dynamics which is an alternative to traditional urban planning. Results. The features and problems of the analysis of the methodological “arsenal” of environmental movement and urban studies are considered. The methods of working with the urban environment are first structured according to the types of knowledge. The proximity of research and design approaches in the case when the urban environment is dealt with is shown. Conclusions. In the nearest future, we can expect new synthetic knowledge and particular methodologies related to both the exacerbation of environmental problems to emerge as well as the expansion of the circle of environmental actors and the process of professionalization of urbanstics.

Research and design of querying approach for XML encrypted data

2010 ◽  
Vol 30 (4) ◽  
pp. 1099-1102
Author(s):  
Yu-yi KE ◽  
Shi-xiong XIA ◽  
Chu-jiao WANG
Keyword(s):  
Encrypted Data ◽  
Research And Design
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