The Research and Design of 915MHz Radio Frequency Reader Based on FPGA

2012 ◽  
Vol 462 ◽  
pp. 524-531
Author(s):  
Shi Lin Fang
Keyword(s):  
Radio Frequency ◽  
Digital Signal ◽  
Flexible Structure ◽  
Type B ◽  
Verilog Hdl ◽  
Rfid Reader ◽  
Quartus Ii ◽  
Cmos Chip ◽  
And Function ◽  
Research And Design

Based on ISO/IEC 18000-6 Type B protocol, 915MHz RFID reader has been designed. FPGA is used to process the digital signal that is based on the protocol and C8051F020 is used as the controller. Each module in FPGA and verification module is designed by Verilog HDL. They are synthesized by Quartus II with EP1C6Q240C8 CMOS chip of the Altera as the target device, and they are verified on both timing and function. The result shows that it could satisfy the technology index of ISO/IEC18000-6 Type B requests and possess the advantages of flexible structure, small size and easily upgrading, etc.

Research and Design of Asynchronous FIFO Based on FPGA

2014 ◽  
Vol 644-650 ◽  
pp. 3440-3444
Author(s):  
Bing Qi Liu ◽  
Ming Zhe Liu ◽  
Gang Yang ◽  
Xiao Bo Mao ◽  
Huai Liang Li
Keyword(s):  
Design Method ◽  
Stable State ◽  
Gray Code ◽  
Validity And Reliability ◽  
Verilog Hdl ◽  
Simulation Test ◽  
Development Platform ◽  
Module Design ◽  
Quartus Ii ◽  
Research And Design

In this article, a design method of asynchronous FIFO memory based on FPGA is put forward. With FPGA as the core controller, We adopt Verilog HDL and top-down design method to build a top-level module design and also analyze the mark logic of asynchronous FIFO and the elimination of semi-stable state under Quartus II development platform. Besides, with the application of Gray code conversion technology, not only the reliable transmission of data is guaranteed but also design efficiency is improved. Through contrast experiment analysis and simulation test, the validity and reliability of asynchronous FIFO memory are verified, meeting the basic requirement that FIFO can hold more enough data without spillovers despite the fullness of data.

Research and Design of Beamforming Device of SLC-LSCMA Algorithm Based on FPGA

2013 ◽  
Vol 347-350 ◽  
pp. 1677-1681
Author(s):  
Qing Fang Zhou ◽  
Yan Yan Yu ◽  
Lei Wang ◽  
Jun Yang
Keyword(s):  
Least Squares ◽  
Satellite Communications ◽  
Clock Frequency ◽  
Verilog Hdl ◽  
Description Language ◽  
Quartus Ii ◽  
Hardware Description ◽  
Timing Simulation ◽  
Array Beamforming ◽  
Research And Design

In this paper,we design a uniform circular array beamforming device of 16 yuan based on the least squares SLC-LSCMA algorithm (based on the linear subspace constrained least squares cma) high stability and rapid convergence for the foundation. The design of the complete beam-forming the SLC-LSCMA algorithm by plural, time-multiplier and accumulators, which uses less resources and faster than the traditional algorithm. The beamforming device uses hardware description language of Verilog HDL , and wires on the QUARTUS II 8.0. Finally the beamforming device is downloaded to the Alteras EP2C35F672C6, and its timing simulation can be run properly in the 50MHz clock frequency. This design can be widely used in mobile communication and satellite communications.

scholarly journals Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits

Computers ◽  
2022 ◽  
Vol 11 (1) ◽  
pp. 11
Author(s):  
Padmanabhan Balasubramanian ◽  
Raunaq Nayar ◽  
Okkar Min ◽  
Douglas L. Maskell
Keyword(s):  
Software Tool ◽  
Digital Signal ◽  
Automatic Generation ◽  
Arithmetic Circuits ◽  
Design Flow ◽  
Attractive Alternative ◽  
Design Environment ◽  
Verilog Hdl ◽  
Arithmetic Circuit ◽  
Practical Applications

Approximate arithmetic circuits are an attractive alternative to accurate arithmetic circuits because they have significantly reduced delay, area, and power, albeit at the cost of some loss in accuracy. By keeping errors due to approximate computation within acceptable limits, approximate arithmetic circuits can be used for various practical applications such as digital signal processing, digital filtering, low power graphics processing, neuromorphic computing, hardware realization of neural networks for artificial intelligence and machine learning etc. The degree of approximation that can be incorporated into an approximate arithmetic circuit tends to vary depending on the error resiliency of the target application. Given this, the manual coding of approximate arithmetic circuits corresponding to different degrees of approximation in a hardware description language (HDL) may be a cumbersome and a time-consuming process—more so when the circuit is big. Therefore, a software tool that can automatically generate approximate arithmetic circuits of any size corresponding to a desired accuracy would not only aid the design flow but also help to improve a designer’s productivity by speeding up the circuit/system development. In this context, this paper presents ‘Approximator’, which is a software tool developed to automatically generate approximate arithmetic circuits based on a user’s specification. Approximator can automatically generate Verilog HDL codes of approximate adders and multipliers of any size based on the novel approximate arithmetic circuit architectures proposed by us. The Verilog HDL codes output by Approximator can be used for synthesis in an FPGA or ASIC (standard cell based) design environment. Additionally, the tool can perform error and accuracy analyses of approximate arithmetic circuits. The salient features of the tool are illustrated through some example screenshots captured during different stages of the tool use. Approximator has been made open-access on GitHub for the benefit of the research community, and the tool documentation is provided for the user’s reference.

scholarly journals Rancang Bangun Sistem Pengaman Sepeda Motor Menggunakan Radio Frequency Identification (RFID) dan Notifikasi Melalui Handphone

2019 ◽  
Vol 8 (1) ◽  
pp. 13-19
Author(s):  
Meli Mildawati ◽  
Wildian Wildian
Keyword(s):  
Radio Frequency ◽  
Radio Frequency Identification ◽  
Reed Switch ◽  
Rfid Tag ◽  
Rfid Reader ◽  
Frequency Identification ◽  
Arduino Uno

Sistem pengaman sepeda motor menggunakan radio frequency identification (RFID) dan notifikasi melalui handphone yang dikontrol dengan modul Arduino Uno telah dirancang bangun. RFID terdiri dari sebuah RFID tag dan RFID reader. RFID tag yang memiliki kode yang berbeda-beda, digunakan sebagai kunci untuk menghidupkan sepeda motor setelah kunci kontak digunakan. RFID reader dapat membaca tag pada jarak maksimal 1,26 cm. Sepeda motor yang dihidupkan tanpa menggunakan RFID tag atau RFID tag tidak sesuai menyebabkan aktifnya reed switch pada pelek roda depan. Ketika roda telah berputar sebanyak empat kali, maka alarm aktif dan GSM SIM 800L mengirimkan notifikasi berupa SMS sebanyak satu kali dan misscall sebanyak tiga kali ke nomor handphone pemilik sepeda motor. Waktu delay rata-rata SMS dan miscall berturut-turut adalah 5,42 s, 8,62 s, 61,14 s dan 113,16 s. Kata kunci: sistem pengaman sepeda motor, RFID, Arduino Uno , reed switch, GSM SIM 800L

scholarly journals Penggunaan Radio Frequency Identification (RFID) dan Mikrokontroler AT89S8253 untuk Pengaman Sepeda Motor

2010 ◽  
Vol 1 (1) ◽  
pp. 51-74
Author(s):  
Muhammad Kifli Hutagalung
Keyword(s):  
Radio Frequency ◽  
Smart Card ◽  
Radio Frequency Identification ◽  
Rfid Reader ◽  
Frequency Identification

Peningkatan jumlah kendaraan bermotor berbanding lurus dengan jumlah pencurian kendaraan bermotor itu sendiri. Para produsen sepeda motor hanya mengandalkan kunci kontak dan kunci stang untuk pengaman sepeda motor dari pencurian. Metode konvensional ini sangat muda untuk dijebol. Radio Frequency Identification (RFID) adalah metode pengamanan dengan menggunakan tag (transponder) sebagai penanda identitas sebuah benda atau kepemilikan sebuah benda. Berbeda dengan kartu ATM atau smart card lainnya penggunaan RFID tidak perlu kontak langsung  dengan pembaca atau readernya, sehingga faktor kerusakan tag/kartu RFID dapat dihindari. Dengan memadukan Tag, RFID Reader dan Mikrokontroler AT89SS8253, rangkaian relay dan motor servo dapat dibangun sebuah pengaman sepeda motor yang lebih handal. Pada kondisi sepeda motor mati pengaman ini akan aktif artinya semua perangkat sepeda motor tidak dapat digunakan dari rem, gas, saluran minyak dan lain- lain. Ketika seseorang mencoba untuk memutus hubungan kabel kunci kontak maka sistema alarm akan aktif dengan ditandai bunyi alarm dan klakson serta semua lampu akan hidup. Sedangkan rem, klose, gas, gigi tidak dapat digunakan. Begitu juga saluran minyak dari tangki ke mesin terputus.

scholarly journals Proton Induced Single Event Effect Characterization on a Highly Integrated RF-Transceiver

Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 519 ◽  
Author(s):  
Jan Budroweit ◽  
Mattis Paul Jaksch ◽  
Maciej Sznajder
Keyword(s):  
Radio Frequency ◽  
Integrated Circuit ◽  
Digital Signal ◽  
Single Event ◽  
Rf Transceiver ◽  
Space Applications ◽  
Radio System ◽  
Filter Bandwidth ◽  
Single Event Effect ◽  
High Level

Radio frequency (RF) systems in space applications are usually designed for a single task and its requirements. Flexibility is mostly limited to software-defined adaption of the signal processing in digital signal processors (DSP) or field-programmable gate arrays (FPGA). RF specifications, such as frequency band selection or RF filter bandwidth are thereby restricted to the specific application requirements. New radio frequency integrated circuit (RFIC) devices also allow the software-based reconfiguration of various RF specifications. A transfer of this RFIC technology to space systems would have a massive impact to future radio systems for space applications. The benefit of this RFIC technology allows a selection of different RF radio applications, independent of their RF parameters, to be executed on a single unit and, thus, reduces the size and weight of the whole system. Since most RF application sin space system require a high level of reliability and the RFIC is not designed for the harsh environment in space, a characterization under these special environmental conditions is mandatory. In this paper, we present the single event effect (SEE) characterization of a selected RFIC device under proton irradiation. The RFIC being tested is immune to proton induced single event latch-up and other destructive events and shows a very low response to single failure interrupts. Thus, the device is defined as a good candidate for future, highly integrated radio system in space applications.

The Design of Passive RFID Reader System Based on MF RC500

2014 ◽  
Vol 1022 ◽  
pp. 135-138
Author(s):  
Song Lin Huang ◽  
Jian Zhong Cui
Keyword(s):  
Radio Frequency ◽  
Automatic Identification ◽  
Human Intervention ◽  
The Third ◽  
Rfid Reader ◽  
Radio Frequency Signals ◽  
Passive Rfid ◽  
Transfer Of Information ◽  
Electronic Tags ◽  
Reader System

RFID is a technology that uses radio frequency signals coupled to the space (alternating magnetic or electromagnetic), to achieve the purpose of non-contact transfer of information and automatic identification. In this paper, RFID reader system is designed based on the MF RC500. Compared with the automatic identification technology such as the barcodes, magnetic cards and IC cards, The RFID reader has many outstanding advantages: firstly, it is safe and suitable for high security terminal. The second, a plurality of electronic tags can be recognized simultaneously. The third, there is no mechanical wear. The fourth, it is convenient to use with non-contact operation and without human intervention when identifying.

Research and Design of Digital Signal Processing Virtual Experiment Platform

2013 ◽  
Vol 401-403 ◽  
pp. 1415-1418
Author(s):  
Xin Zhang
Keyword(s):  
Signal Processing ◽  
Language Development ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Virtual Experiment ◽  
Architecture Model ◽  
Experiment Platform ◽  
Java Language ◽  
Experimental Process ◽  
Research And Design

An intelligent virtual experiment platform can effectively solve the shortcomings of traditional laboratory which is limited by space, time and cost. In this paper, the relevant characteristics of the digital signal processing experiments, the design of a digital signal processing virtual experiment platform. The platform uses B/S architecture model and the Java language, it has platform-independent. The platform allows the user to independently build experimental process, innovation and experimentation; while providing component registration, users can use their own familiar language development component. Through experiments and registered instance, the feasibility and operability of the platform is verified, and it has a good practical value.

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