scholarly journals Energy-efficient coordinated transmission for Cloud-RANs: Algorithm design and trade-off

2014 ◽  
Author(s):  
Vu Nguyen Ha ◽  
Long Bao Le ◽  
Ngoc-Dung Dao
Keyword(s):  
Energy Efficient ◽  
Algorithm Design ◽  
Trade Off

EA Based Approach for Resource Allocation in Cloud Computing

2017 ◽  
Vol 7 (11) ◽  
pp. 98
Author(s):  
Ritika . ◽  
Gantavya Talwar
Keyword(s):  
Resource Allocation ◽  
Cloud Computing ◽  
Energy Efficient ◽  
Energy Savings ◽  
Trade Off ◽  
Positioning Systems ◽  
Turn On ◽  
User Activity

Appealing to the requirement of energy savings, many approaches of energy-efficient locating sensing have been explored. Methods beyond the action of locating are somehow auxiliary, and most of the attentions are focused on locating sensing based methods. A class of lightweight positioning systems has been developed to explore a large part of the energy-accuracy trade-off space. These systems either reduce accuracy requirements, or aggressively use other cues to determine when and where to turn on EA. Implicitly or explicitly, these systems generally make several assumptions about the environment or about user activity. In this research, we proposed an energy efficient cloud based VM in which tasks can be achieved using better SLA and less energy.

Foraging patterns of Water Pipits (Anthus spinoletta) with nestlings

1987 ◽  
Vol 65 (6) ◽  
pp. 1522-1529 ◽  
Author(s):  
Paul Hendricks
Keyword(s):  
Foraging Behavior ◽  
Energy Efficient ◽  
Niche Partitioning ◽  
Delivery Rate ◽  
Female Dominance ◽  
Behavior Changes ◽  
Foraging Patterns ◽  
Trade Off ◽  
Alpine Habitat ◽  
Nest Distribution

Foraging patterns of pairs of Water Pipits (Anthus spinoletta) nesting in alpine habitat in Wyoming were examined for sex-specific differences in division of space, how foraging behavior changes with nestling age, and how foraging behavior is modified to reduce the risk of nest detection by predators. Parental investment (measured by number of deliveries to nestlings, fecal sac removal, and time spent incubating and brooding) was not useful in predicting patterns of sexual niche partitioning of foraging space. There were no consistent patterns as to which sex foraged farthest from the nest. Distribution of the orientation of trip departures from nests, however, was significantly different between pair members in all cases. The mechanism(s) maintaining this pattern of spatial segregation is not known, but it may be the result of female dominance during the breeding season. Delivery rate of food to nestlings was positively correlated to nestling age. There was a concurrent positive correlation between delivery rate and percentage of foraging trips less than 50 m from the nest. Adult pipits flew significantly longer distances from nests when departing with fecal sacs. This is probably an adaptation to reduce the probability of nest detection by predators, and represents a trade-off between energy-efficient foraging and reproductive success.

scholarly journals A low-power 10-bit 6.66 MS/s CMOS SAR ADC with built-in digital calibration dedicated to Wireless Sensor Networks applications

2018 ◽  
Vol 13 (3) ◽  
pp. 1-8
Author(s):  
Felipe Makara ◽  
Lucas Mangini da Silva ◽  
Luis Henrique Assumpção Lolis ◽  
Andre Mariano
Keyword(s):  
Wireless Sensor Networks ◽  
Input Signal ◽  
Energy Efficient ◽  
Sar Adc ◽  
Digital Calibration ◽  
Wireless Sensor ◽  
Trade Off ◽  
Iot Applications ◽  
Improve Accuracy ◽  
Binary Weighted

In this paper, an energy-efficient SAR ADC for IoT applications is presented. The proposed ADC relies on a built-in calibration circuit to improve accuracy and introduces an original DAC that merges the concepts of binary-weighted and C/2C arrays in order to achieve a favorable trade-off between area, accuracy and power consumption. The system consumes 58 µW per conversion cycle sampling at a frequency of 6.66 MHz with an SNDR of 49.78 dB for a 1MHz input signal. With an ENOB of 8 bits, the resulting FOM is 34fJ/conversion-step.

scholarly journals Energy efficient high-performance approximate adders for imprecision-tolerant signal processing applications

2021 ◽  
Vol 2107 (1) ◽  
pp. 012065
Author(s):  
K Komathy Vanitha ◽  
S Anila
Keyword(s):  
Signal Processing ◽  
Energy Efficient ◽  
High Performance ◽  
Large Scale ◽  
Approximate Computing ◽  
Process Technology ◽  
Trade Off ◽  
Large Scale Integration ◽  
Power Delay Product ◽  
Scale Integration

Abstract The trade-off between Delay and Power consumption has become a major concern as process technology reached less than 10 nm proximity in the modern Very Large-Scale Integration (VLSI) technology. This trade-off can be compensated with accuracy and is vanquished by the development of Approximate Computing (AC). In this paper, six diverse Approximate Adders (AAs) have been proposed based on logic complexity reduction at the transistor level. Simulation results reveal that the Proposed AAs has a significant amount of Power and Delay savings, lesser Power-Delay Product (PDP). The Proposed AAs:PA1, PA3, PA5, PA3 exhibits 12.85 %, 41.59%, 72.05 %, 1.91% lesser power than the Existing AAs EAA1, EAA5, EAA6, EAA9 respectively. The Proposed AAs: PA2, PA3 incorporates 37.5 %, 54.5%, of lesser number of transistors compared to Existing AAs: EAA5, EAA9 whereas PA4, PA5 incorporates 40 % of reduction in the number of transistors compared to Existing AAs: EAA6, EAA8. These results are promising for high performance and energy efficient systems for error-resilient applications such as multimedia and signal processing where a slightly degraded output quality is acceptable, which could lead to significant power reduction.

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