FARS: A page replacement algorithm for NAND flash memory based embedded systems

Author(s):  
Ohhoon Kwon ◽  
Hyokyung Bahn ◽  
Kern Koh
2014 ◽  
Vol 2014 ◽  
pp. 1-11 ◽  
Author(s):  
Guangxia Xu ◽  
Lingling Ren ◽  
Yanbing Liu

Due to the limited main memory resource of consumer electronics equipped with NAND flash memory as storage device, an efficient page replacement algorithm called FAPRA is proposed for NAND flash memory in the light of its inherent characteristics. FAPRA introduces an efficient victim page selection scheme taking into account the benefit-to-cost ratio for evicting each victim page candidate and the combined recency and frequency value, as well as the erase count of the block to which each page belongs. Since the dirty victim page often contains clean data that exist in both the main memory and the NAND flash memory based storage device, FAPRA only writes the dirty data within the victim page back to the NAND flash memory based storage device in order to reduce the redundant write operations. We conduct a series of trace-driven simulations and experimental results show that our proposed FAPRA algorithm outperforms the state-of-the-art algorithms in terms of page hit ratio, the number of write operations, runtime, and the degree of wear leveling.


Optik ◽  
2014 ◽  
Vol 125 (3) ◽  
pp. 1167-1173 ◽  
Author(s):  
Mingwei Lin ◽  
Shuyu Chen ◽  
Guiping Wang ◽  
Tianshu Wu

2013 ◽  
pp. 439-455 ◽  
Author(s):  
Pierre Olivier ◽  
Jalil Boukhobza ◽  
Eric Senn

NAND Flash memories gained a solid foothold in the embedded systems domain due to its attractive characteristics in terms of size, weight, shock resistance, power consumption, and data throughput. Moreover, flash memories tend to be less confined to the embedded domain, as it can be observed through the market explosion of flash-based storage systems (average growth of the NVRAM is reported to be about 69% up to 2015). In this chapter, the authors focus on NAND flash memory NVRAM. After a global presentation of its architecture and very specific constraints, they describe the different ways to manage flash memories in embedded systems which are 1) the use of a hardware Flash Translation Layer (FTL), or 2) a dedicated Flash File System (FFS) software support implemented within the embedded operating system kernel.


Webology ◽  
2021 ◽  
Vol 18 (1) ◽  
pp. 62-76
Author(s):  
Hitha Paulson ◽  
Dr.R. Rajesh

The acceptance of NAND flash memories in the electronic world, due to its non-volatility, high density, low power consumption, small size and fast access speed is hopeful. Due to the limitations in life span and wear levelling, this memory needs special attention in its management techniques compared to the conventional techniques used in hard disks. In this paper, an efficient page replacement algorithm is proposed for NAND flash based memory systems. The proposed algorithm focuses on decision making policies based on the relative reference ratio of pages in memory. The size adjustable eviction window and the relative reference based shadow list management technique proposed by the algorithm contribute much to the efficiency in page replacement procedure. The simulation tool based experiments conducted shows that the proposed algorithm performs superior to the well-known flash based page replacement algorithms with regard to page hit ratio and memory read/write operations.


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