HDC: An adaptive buffer replacement algorithm for NAND flash memory-based databases

Optik ◽  
2014 ◽  
Vol 125 (3) ◽  
pp. 1167-1173 ◽  
Author(s):  
Mingwei Lin ◽  
Shuyu Chen ◽  
Guiping Wang ◽  
Tianshu Wu
2014 ◽  
Vol 2014 ◽  
pp. 1-11 ◽  
Author(s):  
Guangxia Xu ◽  
Lingling Ren ◽  
Yanbing Liu

Due to the limited main memory resource of consumer electronics equipped with NAND flash memory as storage device, an efficient page replacement algorithm called FAPRA is proposed for NAND flash memory in the light of its inherent characteristics. FAPRA introduces an efficient victim page selection scheme taking into account the benefit-to-cost ratio for evicting each victim page candidate and the combined recency and frequency value, as well as the erase count of the block to which each page belongs. Since the dirty victim page often contains clean data that exist in both the main memory and the NAND flash memory based storage device, FAPRA only writes the dirty data within the victim page back to the NAND flash memory based storage device in order to reduce the redundant write operations. We conduct a series of trace-driven simulations and experimental results show that our proposed FAPRA algorithm outperforms the state-of-the-art algorithms in terms of page hit ratio, the number of write operations, runtime, and the degree of wear leveling.


Webology ◽  
2021 ◽  
Vol 18 (1) ◽  
pp. 62-76
Author(s):  
Hitha Paulson ◽  
Dr.R. Rajesh

The acceptance of NAND flash memories in the electronic world, due to its non-volatility, high density, low power consumption, small size and fast access speed is hopeful. Due to the limitations in life span and wear levelling, this memory needs special attention in its management techniques compared to the conventional techniques used in hard disks. In this paper, an efficient page replacement algorithm is proposed for NAND flash based memory systems. The proposed algorithm focuses on decision making policies based on the relative reference ratio of pages in memory. The size adjustable eviction window and the relative reference based shadow list management technique proposed by the algorithm contribute much to the efficiency in page replacement procedure. The simulation tool based experiments conducted shows that the proposed algorithm performs superior to the well-known flash based page replacement algorithms with regard to page hit ratio and memory read/write operations.


2013 ◽  
Vol 59 (4) ◽  
pp. 779-785 ◽  
Author(s):  
Mingwei Lin ◽  
Shuyu Chen ◽  
Zhen Zhou

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2172
Author(s):  
Fangjun Wang ◽  
Xianliang Jiang ◽  
Jifu Huang ◽  
Fuguang Chen

NAND flash memory is increasingly widely used as a storage medium due to its compact size, high reliability, low-power consumption, and high I/O speed. It is important to select a powerful and intelligent page replacement algorithm for NAND flash-based storage systems. However, the features of NAND flash, such as the asymmetric I/O costs and limited erasure lifetime, are not fully taken into account by traditional strategies. In order to address these existing shortcomings, this paper suggests a new page replacement algorithm, called probability-based adjustable algorithm onlow inter-reference recency set (PA-LIRS). PA-LIRS completely exploits the “recency” and “frequency” information simultaneously to make a replacement decision. PA-LIRS gives a greater probability to clean pages and a smaller probability to dirty pages when evict selection happens. In addition, this proposed algorithm dynamically adjusts the parameter based on the workload pattern to further improve the I/O performance of NAND flash memory. Through a series of comparative experiments on various types of synthetic traces, the results show that PA-LIRS outperforms the previous studies in most cases.


2012 ◽  
Vol E95.C (5) ◽  
pp. 837-841 ◽  
Author(s):  
Se Hwan PARK ◽  
Yoon KIM ◽  
Wandong KIM ◽  
Joo Yun SEO ◽  
Hyungjin KIM ◽  
...  

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