Energy efficient system-on-chip architecture for non-invasive mobile monitoring of diabetics

2013 ◽  
Author(s):  
Mohammad Alhawari ◽  
Ahsan Khandoker ◽  
Baker Mohammad ◽  
Hani Saleh ◽  
Kinda Khalaf ◽  
...  
Keyword(s):  
Energy Efficient ◽  
System On Chip ◽  
Mobile Monitoring ◽  
Efficient System ◽  
Non Invasive ◽  
On Chip

scholarly journals A Heterogeneous Multicore System on Chip for Energy Efficient Brain Inspired Computing

2018 ◽  
Vol 65 (8) ◽  
pp. 1094-1098 ◽  
Author(s):  
Antonio Pullini ◽  
Francesco Conti ◽  
Davide Rossi ◽  
Igor Loi ◽  
Michael Gautschi ◽  
...  
Keyword(s):  
Energy Efficient ◽  
System On Chip ◽  
Heterogeneous Multicore ◽  
Multicore System ◽  
On Chip

Reliable and efficient system-on-chip design

Computer ◽  
2004 ◽  
Vol 37 (3) ◽  
pp. 42-50 ◽  
Author(s):  
N.R. Shanbhag
Keyword(s):  
System On Chip ◽  
Chip Design ◽  
Efficient System ◽  
On Chip

A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision

2016 ◽  
Author(s):  
Antonio Pullini ◽  
Francesco Conti ◽  
Davide Rossi ◽  
Igor Loi ◽  
Michael Gautschi ◽  
...  
Keyword(s):  
Energy Efficient ◽  
System On Chip ◽  
Core System ◽  
On Chip

scholarly journals ENERGY AND POWER EFFICIENT SYSTEM ON CHIP WITH NANOSHEET FET

2019 ◽  
Vol 01 (01) ◽  
pp. 51-59 ◽  
Author(s):  
Mohan Kumar N.
Keyword(s):  
Power Dissipation ◽  
Cost Efficiency ◽  
Power Efficiency ◽  
System On Chip ◽  
Noise Tolerance ◽  
Single Chip ◽  
Efficient System ◽  
Power Efficient ◽  
On Chip ◽  
The Cost

As the level of integration of IC increases, System on Chip (SoC) design has evolved. This technology comprises of several intellectual property blocks on a single chip. With downsizing of transistors, the traditional elements used impose several challenges such as power dissipation, leakage and so on. These factors risk the cost efficiency of microsystems and risk the semiconductor industry’s capability to prolong Moore’s law in the nanometer range. This is overcome by the introduction of carbon materials such as nanosheet FET. They are advantageous over the traditional elements in terms of area and power efficiency. We design an energy and power efficient SoC with nanosheet FET that provides noise tolerance and memory optimization.

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