Low power high speed ternary content addressable memory design using MOSFET and memristors

2014 ◽  
Author(s):  
Shawana Tabassum ◽  
Farhana Parveen ◽  
A. B. M. Harun-ur Rashid
Keyword(s):  
Low Power ◽  
High Speed ◽  
Content Addressable Memory ◽  
Memory Design ◽  
Ternary Content Addressable Memory

scholarly journals Low Power Implementation Of Ternary Content Addressable Memory (TCAM)

2019 ◽  
Vol 9 (1S3) ◽  
pp. 455-460
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
Clock Cycle ◽  
Reversible Logic ◽  
Ultra Low Power ◽  
Content Addressable Memory ◽  
Power Characteristics ◽  
Ternary Content Addressable Memory ◽  
Network Routers

In network routers, Ternary Content Addressable Memory (TCAM)[1] based search engines take an important role. One of the improved versions of Content Addressable Memory (CAM) is TCAM. For high speed and broader searching operation TCAM is used. Unlike normal CAM, TCAM has 3 logic states: 0, 1, ‘X’. In TCAM within one single clock cycle, search operation can be performed. That is why it is called special type of memory. Also, quick search ability is one of the popular features of TCAM. To compare the search and stored data, TCAM array acts parallel in every location. But high power dissipation is the main disadvantage of TCAM. To overcome this power dissipation in this paper we proposed a low power TCAM implementation by using Reversible logic.[2] Reversible logic has less heat dissipating characteristics property with respect to irreversible gate. Also, Reversible logic has ultra-low power characteristics feature. In recent past it has been proved that reversible gates can implement any Boolean function.

scholarly journals Low Power High Speed Ternary Content Addressable Memory

2019 ◽  
Vol 8 (2) ◽  
pp. 2454-2458
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Search Engine ◽  
High Speed ◽  
Supply Voltage ◽  
Content Addressable Memory ◽  
Ternary Content Addressable Memory

Compared to Binary Content Addressable Memory (BiCAM) there are many applications for Ternary Content Addressable Memory (TCAM) as a search engine. But TCAM consumes more power than BiCAM. So, the saving of TCAM power consumption is the main objective of numerous designs. Precharge phase of the TCAM leads to more power consumption. Newly, a precharge free NOR type BiCAM has been suggested but it takes more time for its operation. Here, precharge free high speed NOR type TCAM is proposed. The proposed TCAM architecture takes power same as precharge free NOR type TCAM but its delay has been reduced by 84% . Simulations performed with cadence 45-nm technology at the supply voltage of 1V.

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