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2020 IEEE Silicon Nanoelectronics Workshop (SNW)
Latest Publications
TOTAL DOCUMENTS
61
(FIVE YEARS 61)
H-INDEX
0
(FIVE YEARS 0)
Published By IEEE
9781728197357
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Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
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Integration of ALD high-k dipole layers into CMOS SOI nanowire FETs for bi-directional threshold voltage engineering
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
◽
10.1109/snw50361.2020.9131427
◽
2020
◽
Author(s):
Wonil Chung
◽
Dongqi Zheng
◽
Wei-E Wang
◽
Mark Rodder
◽
Peide D. Ye
Keyword(s):
Threshold Voltage
◽
High K
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Spatial Color-Perceived Data Control of 3D-TLC NAND Flash for Image Dectection
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131615
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2020
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Author(s):
Chihiro Matsui
◽
Shun Suzuki
◽
Ken Takeuchi
Keyword(s):
Nand Flash
◽
Data Control
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Floating-gate transistor at cryogenic temperature: Characterization and modelling of tunnelling and hot electrons injection
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
◽
10.1109/snw50361.2020.9131666
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2020
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Author(s):
Michele Castriotta
◽
Enrico Prati
◽
Giorgio Ferrari
Keyword(s):
Cryogenic Temperature
◽
Floating Gate
◽
Hot Electrons
◽
Floating Gate Transistor
Download Full-text
Ferroelectric Tunnel Junction Optimization by Plasma-Enhanced Atomic Layer Deposition
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131649
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2020
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Author(s):
Jae Hur
◽
Yuan-Chun Luo
◽
Panni Wang
◽
Nujhat Tasneem
◽
Asif Islam Khan
◽
...
Keyword(s):
Atomic Layer Deposition
◽
Tunnel Junction
◽
Atomic Layer
◽
Layer Deposition
◽
Ferroelectric Tunnel Junction
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Design and Analysis of Core-Gate Shell-Chanel 1T DRAM
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131619
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2020
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Author(s):
Md. Hasan Raza Ansari
◽
Jae Yoon Lee
◽
Seongjae Cho
◽
Byung-Gook Park
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Process and Structure Considerations for the Post FinFET Era
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131422
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2020
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Author(s):
Chun-Jung Su
◽
Po-Jung Sung
◽
Kuo-Hsing Kao
◽
Yao-Jen Lee
◽
Wen-Fa Wu
◽
...
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Effects of Co-doping on the Transport Characteristics of Nanoscale n-type Silicon-on-Insulator Transistors
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131606
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2020
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Author(s):
C. Pandy
◽
A. Debnath
◽
K. Yamaguchi
◽
T. Teja Jupalli
◽
G. Prabhudesai
◽
...
Keyword(s):
Silicon On Insulator
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Co Doping
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Type Silicon
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State-of-the-Art in Silicon Quantum Computer Development
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131614
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2020
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Author(s):
Kohei M. Itoh
Keyword(s):
Quantum Computer
◽
State Of The Art
◽
Computer Development
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Characteristics of Dual-gated Poly-Si Junctionless Nanowire Transistors with Asymmetrical Source/drain Offsets
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131654
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2020
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Author(s):
You-Tai Chang
◽
Ruei-Jen Wu
◽
Kang-Ping Peng
◽
Chun-Jung Su
◽
Pei-Wen Li
◽
...
Keyword(s):
Nanowire Transistors
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Double-gate single-electron devices formed by single-layered Fe nanodot array
2020 IEEE Silicon Nanoelectronics Workshop (SNW)
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10.1109/snw50361.2020.9131663
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2020
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Author(s):
Takayuki Gyakushi
◽
Yuki Asai
◽
Beommo Byun
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Ikuma Amano
◽
Atsushi Tsurumaki-Fukuchi
◽
...
Keyword(s):
Single Electron
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Double Gate
◽
Nanodot Array
◽
Single Electron Devices
◽
Electron Devices
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