A 5.8GHz LC-based digitally controlled oscillator with 20kHz frequency resolution and 37 % tuning range

2009 ◽  
Author(s):  
Rachid El Waffaoui ◽  
Simon Lee
Keyword(s):  
Tuning Range ◽  
Frequency Resolution ◽  
Digitally Controlled ◽  
Digitally Controlled Oscillator

scholarly journals A 3.22–5.45 GHz and 199 dBc/Hz FoMT CMOS Complementary Class-C DCO

2018 ◽  
Vol 2018 ◽  
pp. 1-8
Author(s):  
Lei Ma ◽  
Na Yan ◽  
Sizheng Chen ◽  
Yangzi Liu ◽  
Hao Min
Keyword(s):  
Power Consumption ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Frequency Resolution ◽  
Corner Frequency ◽  
Cmos Process ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Class C ◽  
Digitally Controlled Oscillator

This paper implements a complementary Class-C digitally controlled oscillator (DCO) with differential transistor pairs. The transistors are dynamically biased by feedback loops separately benefiting the robust oscillation start-up with low power consumption. By optimizing three switched capacitor arrays and employing fractional capacitor array with sigma-delta modulator (SDM), the presented DCO operates from 3.22 GHz to 5.45 GHz with a 51.5% frequency tuning range and 0.1 ppm frequency resolution. The design was implemented in a 65 nm CMOS process with power consumption of 2.8 mA at 1.2 V voltage supply. Measurement results show that the phase noise is about −126 dBc/Hz at 3 MHz offset from a 5.054 GHz carrier frequency with the 1/f3 corner frequency of 260 KHz. The resulting FoMT achieves 199.4 dBc/Hz and varies less than 2 dB across the frequency tuning range.

scholarly journals Design of Gigahertz Tuning Range 5 GHz LC Digitally Controlled Oscillator in 0.18 μm CMOS

2016 ◽  
Vol 67 (2) ◽  
pp. 143-148 ◽  
Author(s):  
Marijan Jurgo ◽  
Romualdas Navickas
Keyword(s):  
Tuning Range ◽  
Frequency Tuning ◽  
Frequency Divider ◽  
Fine Tuning ◽  
Voltage Source ◽  
Switched Capacitor ◽  
Digitally Controlled ◽  
Digitally Controlled Oscillator ◽  
5 Ghz ◽  
Capacitor Arrays

Abstract In this paper design and simulation of a 4.3 - 5.4 GHz LC digitally controlled oscillator (LC DCO) in IBM 7RF 0.18 μm CMOS technology are presented. Wide gigahertz tuning range is achieved by using two LC DCOs, sharing same structure. DCO is made of one NMOS negative impedance transistor pair and LC tank, which consists of high quality inductor and two switched capacitor arrays for coarse and fine frequency tuning. Coarse and fine tuning switched capacitor arrays are controlled using 6-bit and 3-bit binary words. To increase available frequency values, frequency divider is used. Structure of frequency divider is based on extended-true-single-phase-clock flip-flops. Divider is made of eight divide-by-2 cells connected in daisy chain, thus division values from 2 to 256 are available. Wide tuning range and high division values allows using such DCO with frequency divider in multi-standart transceivers. Whole device is supplied from a single 1.8 V voltage source. At highest frequency proposed device draws 90 mA current including all buffers. Phase noise is −116.4 dBc/Hz at 1 MHz offset from 5.44 GHz carrier. Designed dual DCO and frequency divider occupies about 0.4mm×0.5mm of chip space and whole chip, including pads, occupies 1.5mm × 1.5mm area of silicon.

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