Implementation of a data acquisition Scheduler-on-Chip (SchoC) for heterogeneous multi-channel signals

Author(s):  
M. Abdallah
Keyword(s):  
2021 ◽  
Vol 6 (4) ◽  
pp. 105-123
Author(s):  
Kennedy Ahamefula Iroanusi

A data acquisition system using a Programmable Logic Gate Array (FPGA) and Graphical User Interface (GUI) for visual enhancement designed for Personal Computer is shown. The data acquisition of voltage (V), current (A) and temperature ( ) signals and/or parameters transmitted at high frequency in real time via the system-on-chip (SOC) created on Spartan 6 FPGA. The system-on-chip is achieved by programming the FPGA with a high-speed hardware description language (Verilog) code written for the system, Printed Circuit Board (PCB) was designed for the system and the GUI has been created using a graphical approach utilizing LabVIEW to enable data monitoring on Personal Computer (PC) display. The FPGA requires digital input signals; therefore, an analogue to digital convertor (ADC) is required for the convert sensor data from analogue signal from sensors to digital signals. A voltage level shifter is required to normalise the voltage level standards within the circuity in between the 5V from the ADC converter and the 3.3V voltage requirement for the FPGA. The Spartan 6 FPGA receives data from the analogue sensors via the ADC, the data are wrapped up in packets and transmitted through RS-232 serial port to the PC. The three aforementioned parameters are monitored on the GUI on the PC presented in both numerical and graphical format and all data can be store in a file for backup storage, maintenance or reference purposes.


Visible light communication is the future of the globe communication having applications in trust areas like V2V communication, Vehicle to infrastructure, medical domain etc., We propose a design for a computer architecture in data acquisition system using system on chip to transmit the image data and the same is received in the receiver side. The proposed mode consist of hardware and software task.The hardware task is designed using zybo board which is soc board and Xilinx is used as an interface between hardware and the system. The proposed mechanism proves to have better data acquisition capability than other models at a higher data rate


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