Analogue circuit optimization in a graphical environment

Author(s):  
P.J. Rankin ◽  
J.M. Siemensma
2022 ◽  
Vol 21 ◽  
pp. 10-17
Author(s):  
Alexander Zemliak

The design process for analogue circuit design is formulated on the basis of the optimum control theory. The artificially introduced special control vector is defined for the redistribution of computational costs between network analysis and parametric optimization. This redistribution minimizes computer time. The problem of the minimal-time network design can be formulated in this case as a classical problem of the optimal control for some functional minimization. There is a principal difference between the new approach and before elaborated methodology. This difference is based on a higher level of the problem generalization. In this case the structural basis of design strategies is more complete and this circumstance gives possibility to obtain a great value of computer time gain. Numerical results demonstrate the effectiveness and prospects of a more generalized approach to circuit optimization. This approach generalizes the design process and generates an infinite number of the different design strategies that will serve as the structural basis for the minimal time algorithm construction. This paper is advocated to electronic systems built with transistors. The main equations for the system design process were elaborated.


Author(s):  
Alexander Zemliak ◽  
Fernando Reyes ◽  
Sergio Vergara

Purpose In this paper, we propose further development of the generalized methodology for analogue circuit optimization. This methodology is based on optimal control theory. This approach generates many different circuit optimization strategies. We lead the problem of minimizing the CPU time needed for circuit optimization to the classical problem of minimizing a functional in optimal control theory. Design/methodology/approach The process of analogue circuit optimization is defined mathematically as a controllable dynamical system. In this context, we can formulate the problem of minimizing the CPU time as the minimization problem of a transitional process of a dynamical system. To analyse the properties of such a system, we propose to use the concept of the Lyapunov function of a dynamical system. This function allows us to analyse the stability of the optimization trajectories and to predict the CPU time for circuit optimization by analysing the characteristics of the initial part of the process. Findings We present numerical results that show that we can compare the CPU time for different circuit optimization strategies by analysing the behaviour of a special function. We establish that, for any optimization strategy, there is a correlation between the behaviour of this function and the CPU time that corresponds to that strategy. Originality/value The analysis shows that Lyapunov function of optimization process and its time derivative can be informative sources for searching a strategy, which has minimal processor time expense. This permits to predict the best optimization strategy by analyzing only initial part of the optimization process.


Author(s):  
Mourad Fakhfakh ◽  
Amin Sallem ◽  
Mariam Boughariou ◽  
Sameh Bennour ◽  
Eya Bradai ◽  
...  

2006 ◽  
Author(s):  
Daniel Lafond ◽  
Yves Lacouture ◽  
Guy Mineau

2021 ◽  
Vol 20 (7) ◽  
Author(s):  
Ismail Ghodsollahee ◽  
Zohreh Davarzani ◽  
Mariam Zomorodi ◽  
Paweł Pławiak ◽  
Monireh Houshmand ◽  
...  

AbstractAs quantum computation grows, the number of qubits involved in a given quantum computer increases. But due to the physical limitations in the number of qubits of a single quantum device, the computation should be performed in a distributed system. In this paper, a new model of quantum computation based on the matrix representation of quantum circuits is proposed. Then, using this model, we propose a novel approach for reducing the number of teleportations in a distributed quantum circuit. The proposed method consists of two phases: the pre-processing phase and the optimization phase. In the pre-processing phase, it considers the bi-partitioning of quantum circuits by Non-Dominated Sorting Genetic Algorithm (NSGA-III) to minimize the number of global gates and to distribute the quantum circuit into two balanced parts with equal number of qubits and minimum number of global gates. In the optimization phase, two heuristics named Heuristic I and Heuristic II are proposed to optimize the number of teleportations according to the partitioning obtained from the pre-processing phase. Finally, the proposed approach is evaluated on many benchmark quantum circuits. The results of these evaluations show an average of 22.16% improvement in the teleportation cost of the proposed approach compared to the existing works in the literature.


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