VDDQ: a built-in self-test scheme for analog on-chip diagnosis, compliant with the IEEE 1149.4 mixed-signal test bus standard

2003 ◽  
Author(s):  
G.O.D. Acevedo ◽  
J. Ramirez-Angulo
Keyword(s):  
Test Scheme ◽  
Mixed Signal ◽  
Self Test ◽  
Built In Self Test ◽  
On Chip

A Mixed-Voltage Sensor Readout Circuit With On-Chip Calibration and Built-In Self-Test

2007 ◽  
Vol 7 (9) ◽  
pp. 1225-1232 ◽  
Author(s):  
Andrew Mason ◽  
Abhijeet V. Chavan ◽  
Kensall D. Wise
Keyword(s):  
Voltage Sensor ◽  
Readout Circuit ◽  
Self Test ◽  
Built In Self Test ◽  
On Chip

On-chip ramp generators for mixed-signal BIST and ADC self-test

2003 ◽  
Vol 38 (2) ◽  
pp. 263-273 ◽  
Author(s):  
B. Provost ◽  
E. Sanchez-Sinencio
Keyword(s):  
Mixed Signal ◽  
Self Test ◽  
On Chip

scholarly journals Measuring Static Parameters of Embedded ADC Core

2011 ◽  
Vol 62 (2) ◽  
pp. 80-86
Author(s):  
Franc Novak ◽  
Peter Mrak ◽  
Anton Biasizzo
Keyword(s):  
Feasibility Study ◽  
Theoretical Background ◽  
System On Chip ◽  
Test Time ◽  
Hardware Overhead ◽  
Self Test ◽  
Built In Self Test ◽  
On Chip ◽  
The Impact ◽  
Minimal Hardware

Measuring Static Parameters of Embedded ADC CoreThe paper presents the results of a feasibility study of measuring static parameters of ADC cores embedded in a System-on-Chip. Histogram based technique is employed because it is suitable for built-in self-test. While the theoretical background of the technique has been covered by numerous papers, less attention has been given to implementations in practice. Our goal was the implementation of histogram test in a IEEE Std 1500 wrapper. Two different solutions pursuing either minimal test time or minimal hardware overhead are described. The impact of MOS switches at ADC input on the performed measurements was considered.

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