On-chip ramp generators for mixed-signal BIST and ADC self-test

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2002.807415 ◽

2003 ◽

Vol 38 (2) ◽

pp. 263-273 ◽

Author(s):

B. Provost ◽

E. Sanchez-Sinencio

Keyword(s):

Mixed Signal ◽

Self Test ◽

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On-chip analog signal generation for mixed-signal built-in self-test

IEEE Journal of Solid-State Circuits ◽

10.1109/4.748183 ◽

1999 ◽

Vol 34 (3) ◽

pp. 318-330 ◽

Author(s):

B. Dufort ◽

G.W. Roberts

Keyword(s):

Analog Signal ◽

Signal Generation ◽

Mixed Signal ◽

Self Test ◽

Built In Self Test ◽

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VDDQ: a built-in self-test scheme for analog on-chip diagnosis, compliant with the IEEE 1149.4 mixed-signal test bus standard

Proceedings of the Fourth IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.02TH8611) ◽

10.1109/iccdcs.2002.1004083 ◽

2003 ◽

Author(s):

G.O.D. Acevedo ◽

J. Ramirez-Angulo

Keyword(s):

Test Scheme ◽

Mixed Signal ◽

Self Test ◽

Built In Self Test ◽

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On-chip analog signal generator for mixed-signal built-in self-test

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143) ◽

10.1109/cicc.1998.695038 ◽

2002 ◽

Author(s):

B. Dufort ◽

G.W. Roberts

Keyword(s):

Signal Generator ◽

Analog Signal ◽

Mixed Signal ◽

Self Test ◽

Built In Self Test ◽

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Built-in self-test scheme for on-chip diagnosis, compliant with the IEEE 1149.4 mixed-signal test bus standard

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) ◽

10.1109/iscas.2002.1009799 ◽

2003 ◽

Author(s):

G.O.D. Acevedo ◽

J. Ramirez-Angulo

Keyword(s):

Test Scheme ◽

Mixed Signal ◽

Self Test ◽

Built In Self Test ◽

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Memory Implementation in a System on Chip with Built-in Self-Test and Recovery Tools

Proceedings of Universities ELECTRONICS ◽

10.24151/1561-5405-2019-24-3-239-247 ◽

2019 ◽

Vol 24 (3) ◽

pp. 239-247

Author(s):

Vladimir G. Ryabtsev ◽

◽

Sergey V. Volobuev ◽

Keyword(s):

System On Chip ◽

Self Test ◽

Built In Self Test ◽

On Chip ◽

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Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture

2011 Design, Automation & Test in Europe ◽

10.1109/date.2011.5763109 ◽

2011 ◽

Author(s):

A Strano ◽

C Gómez ◽

D Ludovici ◽

M Favalli ◽

M E Gómez ◽

...

Keyword(s):

Network On Chip ◽

Structural Redundancy ◽

Self Test ◽

Built In Self Test ◽

On Chip ◽

Test Architecture

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CAD tools for embedded analogue circuits in mixed-signal integrated systems on chip

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:20045116 ◽

2005 ◽

Vol 152 (3) ◽

pp. 317 ◽

Author(s):

G.G.E. Gielen

Keyword(s):

Integrated Systems ◽

Cad Tools ◽

Mixed Signal ◽

Systems On Chip ◽

Analogue Circuits ◽

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Digital, analog, and mixed signal IC and system-on-chip of dual carrier field effect transistor and three dimensional field effect transistor

2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443) ◽

10.1109/icsict.2001.981531 ◽

2002 ◽

Author(s):

C. Huang ◽

Y.H. Yang ◽

D.H. Huang

Keyword(s):

Field Effect ◽

Field Effect Transistor ◽

Three Dimensional ◽

System On Chip ◽

Mixed Signal ◽

Effect Transistor ◽

On Chip ◽

Mixed Signal Ic

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A Mixed-Voltage Sensor Readout Circuit With On-Chip Calibration and Built-In Self-Test

IEEE Sensors Journal ◽

10.1109/jsen.2007.897957 ◽

2007 ◽

Vol 7 (9) ◽

pp. 1225-1232 ◽

Author(s):

Andrew Mason ◽

Abhijeet V. Chavan ◽

Kensall D. Wise

Keyword(s):

Voltage Sensor ◽

Readout Circuit ◽

Self Test ◽

Built In Self Test ◽

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Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip

Industrial Information Technology - EDA for IC Implementation, Circuit Design, and Process Technology ◽

10.1201/9781420007954.ch16 ◽

2006 ◽

pp. 16-1-16-17

Author(s):

Rob Rutenbar ◽

John Cohn

Keyword(s):

Integrated Circuits ◽

Analog Integrated Circuits ◽

Mixed Signal ◽

Signal Systems ◽

Systems On Chip ◽

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