A high-speed serial data acquisition scheme based on Nios II

2011 ◽  
Author(s):  
Wei Zhang ◽  
Jun Shen
Keyword(s):  
Data Acquisition ◽  
High Speed ◽  
Nios Ii ◽  
Acquisition Scheme ◽  
Serial Data

Development of High-Speed Transmission Error Dynamic Detection System Based on NIOS-II and USB

2013 ◽  
Vol 325-326 ◽  
pp. 883-886
Author(s):  
Yong Zheng ◽  
Yan Chen ◽  
Ge Zhu
Keyword(s):  
Data Acquisition ◽  
Data Transmission ◽  
High Speed ◽  
Detection System ◽  
Transmission Error ◽  
Nios Ii ◽  
Error Dynamic ◽  
Fpga Chip ◽  
Dynamic Detection

This paper proposes a high-speed transmission error (TE) dynamic detection system based on NIOS-II and USB. The detection system is in the realization of data acquisition on a FPGA chip, and sends the collected data to specialized data transmission circuit by the chip NIOS-II CPU core, the data transmission circuit composed of USB2.0 main control chip and FIFO chip, which can realize the two-direction communication between data acquisition circuit and PC, so as to realize the TE detection of high-speed side.

scholarly journals A new high–speed FPGA and Ethernet Based Embedded Data Acquisition System

IERI Procedia ◽  
2012 ◽  
Vol 2 ◽  
pp. 444-449 ◽  
Author(s):  
Zhong Luan ◽  
Weigong Zhang ◽  
Yongxiang Zhang ◽  
Yan Lu
Keyword(s):  
Data Acquisition ◽  
High Speed ◽  
Data Acquisition System ◽  
Acquisition System

Design of Data Transfer System Based on PCI Express Interface Applied in High-Speed Railway

2012 ◽  
Vol 229-231 ◽  
pp. 1543-1546
Author(s):  
Xiao Bo Zhou ◽  
Min Xia ◽  
Hai Long Cheng
Keyword(s):  
Data Acquisition ◽  
Data Transmission ◽  
High Speed ◽  
Data Transfer ◽  
Transmission Method ◽  
High Speed Railway ◽  
Pci Express ◽  
Data Acquisition Card ◽  
High Speed Data Acquisition ◽  
High Speed Data

To improve data transmission performance of the data acquisition card, a design of high-speed data transmission system is proposed in the thesis. Using FPGA of programmable logic devices, adopting Verilog HDL of hardware description language, the design of modularization and DMA transmission method is implemented in FPGA. Eventually the design implements the data transmission with high-speed through PCI Express interface. Through simulation and verification based on hardware system, this design is proved to be feasible and can satisfy the performance requirements of data transmission in the high-speed data acquisition card applied in high-speed railway communication. The design also has some value of application and reference for a universal data acquisition card.

A data acquisition and control system for high-speed gamma-ray tomography

2008 ◽  
Vol 19 (9) ◽  
pp. 094012 ◽  
Author(s):  
B T Hjertaker ◽  
R Maad ◽  
E Schuster ◽  
O A Almås ◽  
G A Johansen
Keyword(s):  
Control System ◽  
Data Acquisition ◽  
High Speed ◽  
Gamma Ray ◽  
And Control
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