Development of High-Speed Transmission Error Dynamic Detection System Based on NIOS-II and USB
2013 ◽
Vol 325-326
◽
pp. 883-886
Keyword(s):
Nios Ii
◽
This paper proposes a high-speed transmission error (TE) dynamic detection system based on NIOS-II and USB. The detection system is in the realization of data acquisition on a FPGA chip, and sends the collected data to specialized data transmission circuit by the chip NIOS-II CPU core, the data transmission circuit composed of USB2.0 main control chip and FIFO chip, which can realize the two-direction communication between data acquisition circuit and PC, so as to realize the TE detection of high-speed side.
2012 ◽
Vol 229-231
◽
pp. 1543-1546
2021 ◽
Vol 2113
(1)
◽
pp. 012065
Keyword(s):
2018 ◽
Vol 22
(7)
◽
pp. 1077-1081
Keyword(s):
Keyword(s):
2012 ◽
Vol 472-475
◽
pp. 2315-2319
2016 ◽
Vol 9
(4)
◽
pp. 11-18
2018 ◽
Vol 51
(7-8)
◽
pp. 205-212
◽
Keyword(s):