Design and optimization of edge equalizer for high-speed electrical backplane

Author(s):  
Dianyong Chen ◽  
Bo Wang ◽  
Bangli Liang ◽  
Dezhong Cheng ◽  
Tad Kwasniewski
1999 ◽  
Vol 35 (2) ◽  
pp. 208-215 ◽  
Author(s):  
M. Gokkavas ◽  
B.M. Onat ◽  
E. Ozbay ◽  
E.P. Ata ◽  
J. Xu ◽  
...  

2021 ◽  
Author(s):  
Raghavendra Kamath C ◽  
◽  
Ritesh Bhat ◽  
Siddappa I. Bekinal ◽  
Vijay G. S. ◽  
...  

2018 ◽  
Vol 26 (11) ◽  
pp. 2675-2683
Author(s):  
李 颐 LI Yi ◽  
刘 伟 LIU Wei ◽  
谭亚雄 TAN Ya-xiong ◽  
张晓辉 ZHANG Xiao-hui ◽  
颜昌翔 YAN Chang-xiang

2011 ◽  
Vol 83 ◽  
pp. 261-266
Author(s):  
Bin Li ◽  
Guo Biao Yang ◽  
Fan Ni ◽  
Qi Rong Zhu

Dynamic photoelasticity has been widely utilized to investigate the phenomena generated by impact loading. The dynamic parameters of structures, such as propagation of stress wave and stress concentration, are obtained through this method, which provide guidelines for structure design and optimization. In the previous studies, two-dimensional models are wildly used by researchers. In these models, the inaccuracy of the boundary conditions leads to error amplification during the conversion of the tested results into real ones. In this study of dynamic photoelasticity, three-dimensional models are used. An improved digital dynamic photoelastic system is also adopted to calculate elastic wave propagation in the medium, where the diode-pumped solid-state green laser and high-speed CCD are used as light source luminaries and recording system respectively. Based on these models, where the boundary conditions approach to true value, the resulting data are higher in resolution than is possible with other experimental techniques. This method has been adopted and tested successfully by generating better results with less amplification of errors.


2004 ◽  
Vol 13 (01) ◽  
pp. 121-136 ◽  
Author(s):  
T. AHMAD ◽  
M. A. HOSSAIN ◽  
A. K. RAY ◽  
Z. GHASSEMLOOY

This paper presents an investigation of the design optimization in microstrip lines to reduce the crosstalk level using Fuzzy Logic. In microstrip lines length and spacing, termination conditions of interconnection and output impedance of gates are the major components that cause crosstalk. In order to design high speed printed circuit board (PCB) with optimum interconnection configuration, it is essential to reduce the crosstalk to its minimum tolerance level. A design methodology is proposed to correlate electrical parameters and physical configuration of lines to the crosstalk phenomena. This design is subsequently optimized using Fuzzy Logic to reduce the level of crosstalk. A set of experiments is carried out to demonstrate the capabilities of the design and optimization methods. The effect of the geometrical configuration of the lines on crosstalk, particularly the spacing, is highlighted.


2014 ◽  
Vol 573 ◽  
pp. 187-193 ◽  
Author(s):  
Anitha Ponnusamy ◽  
Palaniappan Ramanathan

The recent increase in popularity of portable systems and rapid growth of packaging density in VLSI circuit’s has enable designers to design complex functional units on a single chip. Power, area and speed plays a major role in the design and optimization of an integrated circuit. Carry select adder is high speed final stage adder widely used in many data processing units. In this work, conventional D-flip flop is replaced by a new design using negative edge triggered D-flip flop. The proposed CSA is implemented in a faster partitioned Dadda multiplier and simulated by using MICROWIND tool. The results reveal that for 16 bit CSA improvement of power delay product (PDP) of the proposed design using negative edge triggered D flip flop is 78% & 18% when compared to CSA with BEC and CSA with conventional D flip flop. When CSA implemented in a partitioned Dadda multiplier it results in performance improvement of 74 % with little increase in total power dissipation.


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