Sinusoidal Pulse Width Modulation using CORDIC algorithm for Single Phase Matrix Converter

Author(s):  
M.A. Rongi ◽  
A. Saparon ◽  
M.K. Hamzah
Energies ◽  
2020 ◽  
Vol 13 (2) ◽  
pp. 434 ◽  
Author(s):  
Xiumei Yue ◽  
Hongliang Wang ◽  
Xiaonan Zhu ◽  
Xinwei Wei ◽  
Yan-Fei Liu

Single-phase full-bridge transformerless topologies, such as the H5, H6, or the highly efficient and reliable inverter concept (HERIC) topologies, are commonly used for leakage current suppression for photovoltaic (PV) applications. The main derivation methodology of full-bridge topologies has been used based on both a DC-based decoupling model and an AC-based decoupling model. However, this methodology is not suited to the search for all possible topologies, and cannot verify whether they are inclusive. Part I of this paper will propose a new topology derivation methodology based on unipolar sinusoidal pulse width modulation (USPWM) to search all possible full-bridge topologies for leakage current suppression. First of all, a unified circuit model is proposed, instead of the DC- and AC-based models. Secondly, a mathematic method called the MN principle is then proposed to search for all possible topologies, and a derivation procedure is provided. It was verified that all existing topologies could be found using the proposed method; furthermore, seven new topologies were derived. The proposed topology derivation methodology is extended to search topologies under Double-Frequency USPWM (DFUSPWM). Twenty topologies under USPWM and four topologies under DFUSPWM have been derived.


2019 ◽  
Vol 8 (2) ◽  
pp. 5285-5287

In this paper, sinusoidal pulse width adjustment strategy for single stage four levels neutral point clamped inverter is proposed disposed of normal mode voltage. Sinusoidal pulse width modulation is much of the time utilized in modern applications. The gating sign are created by contrasting a sinusoidal reference signal and a triangular bearer sign of recurrence. The quantity of heartbeats per half-cycle relies upon the transporter recurrence


Author(s):  
A. Shamsul Rahimi A. Subki ◽  
Mohd Zaidi Mohd Tumari ◽  
Wan Norhisyam Abd Rashid ◽  
Aiman Zakwan Jidin ◽  
Ahmad Nizammuddin Muhammad Mustafa

<span lang="EN-US">In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%.</span>


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