Desain Inverter Full-Bridge 1 Fasa dengan DSP F28069M Menggunakan Teknik SPWM

Intisari- Seiring perkembangan tekhnologi, dengan adanya inverter bisa didapatkan energi listrik sementara untuk beberapa perangkat elektronik dengan menggunakan sumber DC. Pada artikel ini, inverter yang dirancang merupakan inverter 1 fasa dengan input senilai 17 VDC dan output senilai 220 VAC . Proses switching pada inverter yang dirancang menggunakan teknik Sinusoidal Pulse Width Modulation (SPWM). Tujuan pada penelitian ini adalah mendesain dan membuat perangkat inverter full-bridge 1 fasa dengan mengatur switching mosfet menggunakan DSP F28069M dengan tujuan menghasilkan tegangan keluaran berupa gelombang sinusoidal murni. Inverter full-bridge 1 fasa didesain dengan merubah tegangan dari catu daya sebesar 12 – 24 VDC menjadi 12 – 24 VAC. Kemudian tegangan 12 – 24 VAC tersebut dinaikkan dengan menggunakan transformator step up. Hasil pengujian inverter dari 17 VDC menggunakan transformator step up 15/220 VAC dengan efisiensi 81,4 %. Hasil dari sinyal SPWM dengan masukan inverter 17 VDC tegangan yang dikeluarkan oleh inverter sebesar 227 VAC tanpa beban, sebesar 194 VAC dengan daya beban 22 Watt, sebesar 178 VAC dengan daya beban 40 Watt, sebesar 162 VAC dengan daya beban 88 Watt, dan sebesar 154 VAC dengan daya beban 128 Watt

Design of new structure of multilevel inverter based on modified absolute sinusoidal PWM technique

The advantage of multilevel inverters is to produce high output voltage values with distortion as minimum as possible. To reduce total harmonic distortion (THD) and get an output voltage with different step levels using less power electronics switching devices, 15-level inverter is designed in this paper. Single-phase 11-switches with zero-level (ZL) and none-zero-level (NZL) inverter based on modified absolute sinusoidal pulse width modulation (MASPWM) technique is designed, modelled and built by MATLAB/Simulink. Simulation results explained that, multilevel inverter with NZL gives distortion percent less than that with ZL voltage. The THD of the inverter output voltage and current of ZL are 4% and 1%, while with NZL is 3.6% and 0.84%, respectively. These results explain the effectiveness of the suggested power circuit and MASPWM controller to get the required voltage with low THD.

A grid interconnected nested neutral point clamped inverter with voltage synchronization using synchronous reference frame controller

<p><span lang="EN-US">Nested neutral point clamped multi level inverter with inter connection to grid through the synchronous reference frame (SRF) controller for synchronization of voltage to the grid is demonstrated. The system's main feature is that voltage stress in each inverter switching device is kept to a minimum, and redundant inverter switching states are utilised for neutral point and flying capacitor voltage balancing with sinusoidal pulse-width modulation (PWM) technique, synchronisation to grid voltages, and power injection with low harmonic generation. The inverter receives its input from a photovoltaic (PV) source that is coupled to DC-DC booster converters that are regulated by the maximum power point tracking (MPPT) incremental conductance algorithm to maintain a constant dc voltage. The system is examined under various load conditions with MATLAB Simulink model.</span></p>

A grid interconnected nested neutral-point clamped inverter with voltage synchronization using synchronous reference frame controller

<p><span lang="EN-US">Nested neutral-point clamped multi level inverter with inter connection to grid through the synchronous reference frame (SRF) controller for synchronization of voltage to the grid is demonstrated. The system's main feature is that voltage stress in each inverter switching device is kept to a minimum, and redundant inverter switching states are utilised for neutral point and flying capacitor voltage balancing with sinusoidal pulse-width modulation (PWM) technique, synchronisation to grid voltages, and power injection with low harmonic generation. The inverter receives its input from a photovoltaic (PV) source that is coupled to DC-DC booster converters that are regulated by the maximum power point <span lang="EN-US">(MPP)</span> tracking incremental conductance algorithm to maintain a constant dc voltage. The system is examined under various load conditions with MATLAB/Simulink model.</span></p>

A Hybrid Self-Voltage Balanced Multilevel Inverter Topologies for Induction Motors

A hybrid structured asymmetric switching capacitor multilevel inverter (ASC-MLI) is suggested in this work. The notion behind presenting this topology is to reduce the device count and DC sources as compared with conventional MLI. The step by step operating mode of single phase ASC-MLI is presented and by doing slight modifications the same configuration is used in three phase utility application and electric drive. The proposed configurations utilize major benefits of self-voltage balancing capability of capacitor voltage, which is independent from different load type and modulations index. To generate the switching pulse for corresponding switches the multi-carrier based sinusoidal pulse width modulation (MCS-PWM) technique is used; in addition to this simulation result are obtained using MATLAB/Simulink 2016b software version. Simulation results of an induction motor drive connected as three phase load highlights good performance of 17-level MLI.

Pulse-Width Modulation Template for Five-Level Switch-Clamped H-Bridge-Based Cascaded Multilevel Inverter

This article presents a carrier-based pulse-width modulation (PWM) template for a 5-level, H bridge-based cascaded multilevel inverter (MLI). The developed control concept generates adequate modulation template for this inverter topology wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. With this modulation approach, classical multiplicity and synchronization of the triangular carrier signals criterion for the extension of sinusoidal pulse-width modulation, SPWM, to several cascaded 5-level, H-bridge-based MLI topology are removed. The proposed template can be used on the inverter configuration of any level with no further control modification. Nearly even distribution of switching pulses and equalized individual cascaded cell output power were achieved with the proposed modulation scheme. Three 5-level, H-bridge-based MLI units were cascaded for 1-phase, 13-level inverter operation; simulation and experimental results are adequately presented.

Design of a New Duty Cycle Modulation to Improve the Energy Quality of an Insulated Production System

In this article, we propose a new strategy for controlling three-phase inverters of renewable energy sources, based on the Duty Cycle Modulatiom (DCM) control using the Park and Fortescue transformation (DCM-dq-dih). Our goals in setting and using this strategy are, on the one hand, to induce a lower harmonic rate as compared to the SPWM (Sinusoidal Pulse Width Modulation) strategy and on the other hand, this control technique enables the inverter to deliver balanced voltages, be it in the event of load unbalance. Our design is built on the basis of the known mode of DCM control of single-phase inverters. Thus, the control of our three-phase inverter is carried out by three DCM modules whose set-points come from the direct, reverse and homopolar strings reconstructed in a Park landmark. This new strategy was tested on the MATLAB Simulink environment for a load of 160 kW. The test results show a reduced Total Harmonic Distorsion (THD) of 2.7 times compared to the THD produced by the SPWM control strategy. In addition, regulation of the symmetrical components during load unbalance is ensured so that the inverter always delivers constant and balanced voltages.