Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors with Reduced Vertical Nanowires Separation, New Work Function Metal Gate Solutions, and DC/AC Performance Optimization
Keyword(s):
New Work
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2010 ◽
Vol 57
(10)
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pp. 2515-2525
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2007 ◽
Vol 28
(12)
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pp. 1089-1091
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Keyword(s):
Keyword(s):
2018 ◽
Vol 65
(11)
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pp. 4780-4785
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2011 ◽
Vol 2
(1)
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pp. 11-24
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