An output capacitor-less cascode flipped voltage follower based low dropout regulator

2015 ◽  
Author(s):  
Pratibha Kumari ◽  
Gangasagar Panuganti ◽  
Suresh Alapati ◽  
Sreehari Rao Patri
Keyword(s):  
Flipped Voltage Follower ◽  
Voltage Follower ◽  
Low Dropout Regulator ◽  
Output Capacitor

scholarly journals An Output Capacitor-Less Low-Dropout Regulator with 0–100 mA Wide Load Current Range

Energies ◽  
2019 ◽  
Vol 12 (2) ◽  
pp. 211 ◽  
Author(s):  
Jihoon Park ◽  
Woong-Joon Ko ◽  
Dong-Seok Kang ◽  
Yoonmyung Lee ◽  
Jung-Hoon Chun
Keyword(s):  
Cmos Process ◽  
Load Current ◽  
Flipped Voltage Follower ◽  
Better Regulation ◽  
Wide Range ◽  
Voltage Follower ◽  
Low Dropout Regulator ◽  
Output Capacitor ◽  
Ldo Regulator ◽  
Two Stages

An output capacitor-less low-dropout (OCL-LDO) regulator with a wide range of load currents is proposed in this study. The structure of the proposed regulator is based on the flipped-voltage-follower LDO regulator. The feedback loop of the proposed regulator consists of two stages. The second stage is turned on or off depending on the variation in the output load current. Hence, the regulator can retain a phase margin at a wide range of load currents. The proposed regulator exhibits a better regulation performance compared to the ones in previous studies. The test chip is fabricated using a 65-nm CMOS process.

A flipped-voltage-follower-based low-dropout regulator with signal- and transient-current boosting

2020 ◽  
Vol 105 (3) ◽  
pp. 471-476
Author(s):  
Yuet Ho Woo ◽  
Koi Shu Ho ◽  
Yajun Lin ◽  
Yong Zhou ◽  
Ka Nang Leung ◽  
...  
Keyword(s):  
Transient Current ◽  
Flipped Voltage Follower ◽  
Voltage Follower ◽  
Low Dropout Regulator

A Cap-less Voltage Spike Detection and Correction Circuit for Low Dropout Regulator

2020 ◽  
Vol 29 (16) ◽  
pp. 2020009
Author(s):  
P. Manikandan ◽  
B. Bindu
Keyword(s):  
Steady State ◽  
Output Voltage ◽  
Settling Time ◽  
Spike Detection ◽  
Flipped Voltage Follower ◽  
Output Spike ◽  
Voltage Follower ◽  
Low Dropout Regulator ◽  
Node Voltage ◽  
Voltage Spike

A cap-less voltage spike detection and correction circuit for flipped voltage follower (FVF)-based low dropout regulator (LDO) is proposed in this paper. The transients in the output voltage are controlled by the pull-up currents [Formula: see text] and [Formula: see text] and pull-down currents [Formula: see text] and [Formula: see text]. These currents are dynamic current sources which are activated only during transient period and noise contributed by these current sources at steady state is zero. These currents increase/decrease based on the intermediate FVF node voltage [Formula: see text]. The proposed circuit detects the output voltage via [Formula: see text] and controls the power MOSFET gate and output capacitances by changing the pull-up and pull-down currents whenever the load changes. The proposed circuit consumes small additional bias current in the steady state and achieves less settling time and output spike voltage. This LDO is simulated using 180[Formula: see text]nm technology and the simulation result shows that the LDO has good load transient response with 190[Formula: see text]ns settling time and 170[Formula: see text]mV voltage spike over 1[Formula: see text]mA to 100[Formula: see text]mA load current range.

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