A formulation for quick evaluation and optimization of digital CMOS circuits

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) ◽

10.1109/iscas.1999.780161 ◽

2003 ◽

Author(s):

M. Shams ◽

M.I. Elmasry

Keyword(s):

Cmos Circuits ◽

Download Full-text

Generic linear RC delay modeling for digital CMOS circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.45868 ◽

1990 ◽

Vol 9 (4) ◽

pp. 367-376 ◽

Author(s):

A.-C. Deng ◽

Y.-C. Shiau

Keyword(s):

Cmos Circuits ◽

Digital Cmos ◽

Download Full-text

Amplification, feedback, and sub-biasing: Applying analog techniques to high-speed, low-power digital CMOS circuits

2017 International Symposium on Signals, Circuits and Systems (ISSCS) ◽

10.1109/isscs.2017.8034947 ◽

2017 ◽

Author(s):

Daniel Foty

Keyword(s):

Low Power ◽

Cmos Circuits ◽

Download Full-text

Piecewise-linear timing delay modeling for digital CMOS circuits

IEEE Transactions on Circuits and Systems ◽

10.1109/31.7609 ◽

1988 ◽

Vol 35 (10) ◽

pp. 1330-1334 ◽

Author(s):

A.-C. Deng

Keyword(s):

Piecewise Linear ◽

Cmos Circuits ◽

Digital Cmos ◽

Download Full-text

Resonance circuits for adiabatic circuits

Advances in Radio Science ◽

10.5194/ars-1-223-2003 ◽

2003 ◽

Vol 1 ◽

pp. 223-228

Author(s):

C. Schlachta ◽

M. Glesner

Keyword(s):

Energy Storage ◽

Power Consumption ◽

Charge Transport ◽

Cmos Circuits ◽

Digital Cmos ◽

Storage Element

Abstract. One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.

Download Full-text

Statistical power optimization of deep-submicron digital CMOS circuits based on structured perceptron

2014 International Symposium on Integrated Circuits (ISIC) ◽

10.1109/isicir.2014.7029446 ◽

2014 ◽

Author(s):

Amir Zjajo ◽

Nick van der Meijs ◽

Rene van Leuken

Keyword(s):

Statistical Power ◽

Power Optimization ◽

Deep Submicron ◽

Cmos Circuits ◽

Download Full-text

Power Dissipation in Digital CMOS Circuits

The Kluwer International Series in Engineering and Computer Science - Low-Power Deep Sub-Micron CMOS Logic ◽

10.1007/978-1-4020-2849-6_3 ◽

2004 ◽

pp. 11-52

Author(s):

P. R. van der Meer ◽

A. van Staveren ◽

A. H. M. van Roermund

Keyword(s):

Power Dissipation ◽

Cmos Circuits ◽

Download Full-text

An examination of feedback bridging faults in digital CMOS circuits

1993 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.1993.394026 ◽

2002 ◽

Author(s):

B.K. Koch ◽

K.D. Muller-Glaser

Keyword(s):

Cmos Circuits ◽

Bridging Faults ◽

Download Full-text

Reliability of a focused ion beam repair on digital cmos circuits

Microelectronics Reliability ◽

10.1016/0026-2714(96)00198-9 ◽

1996 ◽

Vol 36 (11-12) ◽

pp. 1787-1790 ◽

Author(s):

R Van Camp ◽

K Van Doorselaer ◽

I Clemminck

Keyword(s):

Focused Ion Beam ◽

Ion Beam ◽

Cmos Circuits ◽

Download Full-text

Oscillation and sequential behavior caused by interconnect opens in digital CMOS circuits

Proceedings International Test Conference 1997 ◽

10.1109/test.1997.639668 ◽

2002 ◽

Author(s):

H. Konuk ◽

F.J. Ferguson

Keyword(s):

Cmos Circuits ◽

Digital Cmos ◽

Sequential Behavior

Download Full-text

Basic Digital CMOS Circuits

System Integration ◽

10.1002/0470020717.ch5 ◽

2005 ◽

pp. 227-286

Keyword(s):

Cmos Circuits ◽

Download Full-text