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Subthreshold leakage reduction: A comparative study of SCL and CMOS design
2009 IEEE International Symposium on Circuits and Systems
◽
10.1109/iscas.2009.5118322
◽
2009
◽
Cited By ~ 2
Author(s):
Armin Tajalli
◽
Yusuf Leblebici
Keyword(s):
Comparative Study
◽
Leakage Reduction
◽
Cmos Design
◽
Subthreshold Leakage
Download Full-text
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References
Subthreshold Leakage reduction Strategies for the Design of Low Power Sram
i-manager s Journal on Circuits and Systems
◽
10.26634/jcir.1.4.2590
◽
2013
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Vol 1
(4)
◽
pp. 6-13
Author(s):
Vanitha .
◽
◽
M. Parimaladevi
◽
D. Sharmila
◽
◽
...
Keyword(s):
Low Power
◽
Leakage Reduction
◽
Reduction Strategies
◽
Subthreshold Leakage
Download Full-text
An MTCMOS Subthreshold-Leakage Reduction Algorithm
2020 2nd Novel Intelligent and Leading Emerging Sciences Conference (NILES)
◽
10.1109/niles50944.2020.9257933
◽
2020
◽
Author(s):
Sherif M. Sharroush
Keyword(s):
Reduction Algorithm
◽
Leakage Reduction
◽
Subthreshold Leakage
Download Full-text
ONOFIC Pull-Up Approach in Domino Logic Circuits Using FinFET for Subthreshold Leakage Reduction
Circuits Systems and Signal Processing
◽
10.1007/s00034-018-0980-8
◽
2018
◽
Vol 38
(6)
◽
pp. 2564-2587
Author(s):
Vijay Kumar Magraiya
◽
Tarun Kumar Gupta
Keyword(s):
Logic Circuits
◽
Domino Logic
◽
Leakage Reduction
◽
Subthreshold Leakage
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Revisited Design of Short-pulse Power Gated Approach of Subthreshold Leakage Reduction Technique in Combinational Circuits
2018 IEEE International Conference on System, Computation, Automation and Networking (ICSCA)
◽
10.1109/icscan.2018.8541204
◽
2018
◽
Cited By ~ 2
Author(s):
G Amuthavalli
◽
R Gunasundari
Keyword(s):
Short Pulse
◽
Reduction Technique
◽
Pulse Power
◽
Combinational Circuits
◽
Leakage Reduction
◽
Subthreshold Leakage
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Comparative Study on SRAMs for Suppressing Both Oxide-Tunneling Leakage and Subthreshold Leakage in Sub-70-nm Leakage Dominant VLSIs
20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)
◽
10.1109/vlsid.2007.49
◽
2007
◽
Cited By ~ 2
Author(s):
Duk-hyung Lee
◽
Dong-kone Kwak
◽
Kyeong-sik Min
Keyword(s):
Comparative Study
◽
Subthreshold Leakage
Download Full-text
A novel technique for static leakage reduction in 16 nm CMOS design
International Journal of Electronics Letters
◽
10.1080/21681724.2018.1525765
◽
2018
◽
Vol 7
(4)
◽
pp. 434-447
◽
Cited By ~ 1
Author(s):
Smita Singhal
◽
Anu Mehra
Keyword(s):
Leakage Reduction
◽
Novel Technique
◽
Cmos Design
Download Full-text
A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction
2007 IEEE International Symposium on Circuits and Systems
◽
10.1109/iscas.2007.378652
◽
2007
◽
Cited By ~ 2
Author(s):
Rodrigo Jaramillo-Ramirez
◽
Mohab Anis
Keyword(s):
Leakage Reduction
◽
Routing Design
◽
Subthreshold Leakage
Download Full-text
Adaptive Subthreshold Leakage Reduction Through N/P Wells Reverse Biasing
Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
◽
10.1007/978-3-540-30205-6_4
◽
2004
◽
pp. 16-16
Author(s):
Carlo Dallavalle
Keyword(s):
Leakage Reduction
◽
Subthreshold Leakage
Download Full-text
Comparative study of subthreshold leakage in CNFET & MOSFET @ 32-nm technology node
2016 International Conference on Microelectronics, Computing and Communications (MicroCom)
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10.1109/microcom.2016.7522453
◽
2016
◽
Cited By ~ 4
Author(s):
Pratyush Dwivedi
◽
Krishna Kumar
◽
Aminul Islam
Keyword(s):
Comparative Study
◽
Technology Node
◽
Subthreshold Leakage
Download Full-text
Simulation and optimization of FILOX vertical MOSFET for subthreshold leakage reduction
2014 International Conference on Informatics, Electronics & Vision (ICIEV)
◽
10.1109/iciev.2014.6850806
◽
2014
◽
Author(s):
Md Enamul Haque Talal
◽
Peter Ashburn
Keyword(s):
Simulation And Optimization
◽
Leakage Reduction
◽
Subthreshold Leakage
Download Full-text
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