Hardware Trojans Detection at Register Transfer Level Based on Machine Learning

2019 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2019.8702479 ◽

2019 ◽

Author(s):

Tao Han ◽

Yuze Wang ◽

Peng Liu

Keyword(s):

Machine Learning ◽

Register Transfer Level ◽

Hardware Trojans ◽

Register Transfer

Download Full-text

Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level

2019 IEEE 28th Asian Test Symposium (ATS) ◽

10.1109/ats47505.2019.00018 ◽

2019 ◽

Author(s):

Hau Sim Choo ◽

Chia Yee Ooi ◽

Michiko Inoue ◽

Nordinah Ismail ◽

Mehrdad Moghbel ◽

...

Keyword(s):

Machine Learning ◽

Register Transfer Level ◽

Hardware Trojan ◽

Abstraction Level ◽

Register Transfer

Download Full-text

Circuit Vulnerabilities to Hardware Trojans at the Register-Transfer Level

Trusted Digital Circuits ◽

10.1007/978-3-319-79081-7_2 ◽

2018 ◽

pp. 13-29

Author(s):

Hassan Salmani

Keyword(s):

Register Transfer Level ◽

Hardware Trojans ◽

Register Transfer

Download Full-text

Register-Transfer-Level Features for Machine-Learning-Based Hardware Trojan Detection

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.2019eap1044 ◽

2020 ◽

Vol E103.A (2) ◽

pp. 502-509

Author(s):

Hau Sim CHOO ◽

Chia Yee OOI ◽

Michiko INOUE ◽

Nordinah ISMAIL ◽

Mehrdad MOGHBEL ◽

...

Keyword(s):

Machine Learning ◽

Register Transfer Level ◽

Hardware Trojan ◽

Hardware Trojan Detection ◽

Trojan Detection ◽

Register Transfer

Download Full-text

Design Techniques for Hardware Trojans Prevention and Detection at the Register-Transfer Level

Trusted Digital Circuits ◽

10.1007/978-3-319-79081-7_3 ◽

2018 ◽

pp. 31-38

Author(s):

Hassan Salmani

Keyword(s):

Register Transfer Level ◽

Hardware Trojans ◽

Register Transfer ◽

Design Techniques

Download Full-text

Efficient Machine Learning Model for Hardware Trojan Detection on Register Transfer Level

10.1109/icspis53734.2021.9652443 ◽

2021 ◽

Author(s):

Fajar Wijitrisnanto ◽

Sarwono Sutikno ◽

Septafiansyah Dwi Putra

Keyword(s):

Machine Learning ◽

Learning Model ◽

Register Transfer Level ◽

Hardware Trojan ◽

Hardware Trojan Detection ◽

Trojan Detection ◽

Machine Learning Model ◽

Register Transfer ◽

Efficient Machine

Download Full-text

Standard for Verilog register transfer level synthesis

10.3403/30128339u ◽

2015 ◽

Keyword(s):

Register Transfer Level ◽

Register Transfer

Download Full-text

Fault Modeling of Combinational and Sequential Circuits at Register Transfer Level

International Journal of VLSI Design & Communication Systems ◽

10.5121/vlsic.2011.2406 ◽

2011 ◽

Vol 2 (4) ◽

pp. 61-68

Author(s):

M S Suma

Keyword(s):

Fault Modeling ◽

Register Transfer Level ◽

Sequential Circuits ◽

Register Transfer ◽

Combinational And Sequential Circuits

Download Full-text

Incorporating the controller effects during register transfer level synthesis

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC ◽

10.1109/edtc.1994.326916 ◽

2002 ◽

Author(s):

C. Ramachandran ◽

F.J. Kurdahi

Keyword(s):

Register Transfer Level ◽

Register Transfer

Download Full-text

A non-scan DFT method at register-transfer level to achieve complete fault efficiency

Proceedings of the 2000 conference on Asia South Pacific design automation - ASP-DAC '00 ◽

10.1145/368434.368825 ◽

2000 ◽

Author(s):

Satoshi Ohtake ◽

Hiroki Wada ◽

Toshimitsu Masuzawa ◽

Hideo Fujiwara

Keyword(s):

Register Transfer Level ◽

Register Transfer

Download Full-text

Test pattern generators for distributed and embedded built-in self-test at register transfer level

Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design ◽

10.1109/isqed.2001.915236 ◽

2002 ◽

Author(s):

V. Vorisek

Keyword(s):

Test Pattern ◽

Register Transfer Level ◽

Register Transfer ◽

Self Test ◽

Built In Self Test ◽

Pattern Generators

Download Full-text