Impact of Hole-Deficiency and Charge Trapping on Threshold Voltage Stability of p-GaN HEMT under Reverse-bias Stress

Author(s):  
Junting Chen ◽  
Mengyuan Hua ◽  
Jiali Jiang ◽  
Jiabei He ◽  
Jin Wei ◽  
...  
Author(s):  
Meng Lu ◽  
Yiqiang Chen ◽  
Min Liao ◽  
Chang Liu ◽  
Shuaizhi Zheng ◽  
...  

1990 ◽  
Vol 192 ◽  
Author(s):  
Tetsu Ogawa ◽  
Sadayoshi Hotta ◽  
Horoyoshi Takezawa

ABSTRACTThrough the time and temperature dependence measurements on threshold voltage shifts (Δ VT) in amorphous silicon thin film transistors, it has been found that two separate instability mechanisms exist; within short stress time ranges Δ Vτ increases as log t and this behavior corresponds to charge trapping in SiN. On the other hand, in long stress time ranges Δ VT increases as t t/4 and can be explained by time-dependent creation of trap in a-Si.


2019 ◽  
Vol 954 ◽  
pp. 144-150
Author(s):  
Zhi Qiang Bai ◽  
Xiao Yan Tang ◽  
Chao Han ◽  
Yan Jing He ◽  
Qing Wen Song ◽  
...  

Even with SiC power MOSFETs released into the commercial market, the threshold voltage instability caused by near interface states is still an attracting issue, which is a major obstacle to further improving the device performance. In this paper, the effects of temperature storage on the threshold voltage stability of n-channel 4H-SiC VDMOSFET are studied. It is found that the capture of hole traps is dominant during the long-term temperature storage at 425 K, causing a considerable negative shift of threshold voltage. In view of the influence of temperature storage, the positive and negative drift trends of threshold voltage slow down during the gate-bias stress measurement. And the ∆VTH, the difference between the threshold voltages recorded after positive and negative gate-bias stress in the same duration, also grows slowly with the increasing stress duration. Finally, some suggestions for improving the threshold reliability of n-channel SiC VDMOSFETs are presented.


2020 ◽  
Vol 54 (1) ◽  
pp. 015105
Author(s):  
Liang Cheng ◽  
Weizong Xu ◽  
Danfeng Pan ◽  
Huinan Liang ◽  
Ronghua Wang ◽  
...  

2012 ◽  
Vol 1432 ◽  
Author(s):  
Enrico Zanoni ◽  
Gaudenzio Meneghesso ◽  
Matteo Meneghini ◽  
Antonio Stocco

ABSTRACTIn this paper, we compare degradation modes and failure mechanisms of different AlGaN/GaN HEMT technologies. We present data concerning reverse-bias degradation of GaN-based HEMTs, which results in a dramatic increase of gate leakage current, and present a timedependent model for gate degradation. Some of the tested technologies demonstrated to be immune from this failure mechanism up to drain-gate voltages in excess of 100 V. When this was the case, the main failure mode consisted of drain current degradation during on-state tests, resulting from charge trapping in the gate-drain access region attributed to hot-electron effects. Finally, the use of diagnostic techniques such as electroluminescence microscopy and Deep Level Transient Spectroscopy for the identification of failure modes and mechanisms of GaNbased HEMTs is reviewed. Concerning reverse-bias degradation of GaN-based HEMTs, we demonstrate that, (i) when submitted to reverse-gate stress, HEMTs can show both recoverable and permanent degradation. (ii) recoverable degradation consists of a decrease in gate current and threshold voltage, which are ascribed to the simultaneous trapping of negative charge in the AlGaN layer, and of positive charge close to the AlGaN/GaN interface. (iii) permanent degradation is manifested by the generation of parasitic leakage paths. Time-dependent analysis suggests that permanent degradation can be ascribed to a defect generation and percolation process. Results supports the existence of a time to breakdown for HEMT degradation, which significantly depends on the stress voltage level. On the contrary, AlGaN/GaN technologies which were found to be resistant to gate degradation (off-state critical voltage larger than 100 V for a 0.25 um gate device) were subjected to on-state tests at different gate and drain voltage levels. All tests showed a non-recoverable degradation of electrical parameters (drain saturation current, threshold voltage and on-state resistance) and electroluminescence signal EL, with a strong dependence on the EL value of the bias point, and a negligible dependence of temperature. Once verified that EL intensity represents a reliable estimate of channel hot electron effects, we attributed the degradation to hot electron trapping in the gate-drain access region. Using EL intensity as a measure of the stress acceleration factor, we derived an acceleration law for GaN HEMT hot electron degradation similar to the one already demonstrated for GaAs devices.


2006 ◽  
Vol 911 ◽  
Author(s):  
Sumi Krishnaswami ◽  
Sei-Hyung Ryu ◽  
Bradley Heath ◽  
Anant Agarwal ◽  
John Palmour ◽  
...  

AbstractThe commercialization of 4H-SiC MOSFETs will greatly depend on the reliability of gate oxide. Long-term gate oxide reliability and device stability of 1200 V 4H-SiC MOSFETs are being studied, both under the on- and off-states. Device reliability is studied by stressing the device under three conditions: (a) Gate stress - a constant gate voltage of +15 V is applied to the gate at a temperature of 175°C. The forward I-V characteristics and threshold voltage are monitored for device stability, (b) Forward current stress – devices are stressed under a constant drain current of Id = 4 A and Vg = 20 V. The devices were allowed to self-heat to a temperature of Tsink = 125°C and the I-V curves are monitored with time, and (c) High temperature reverse bias testing at 1200 V and 175°C to study the reliability of the devices in the off-state. Our very first measurements on (a) and (b) show very little variation between the pre-stress and post-stress I-V characteristics and threshold voltage up to 1000 hrs of operation at 175°C indicating excellent stability of the MOSFETs in the on-state. In addition, high temperature reverse bias stress test looks very promising with the devices showing very little variation in the reverse leakage current with time.


2012 ◽  
Vol 15 (4) ◽  
pp. H108 ◽  
Author(s):  
Sun-Jae Kim ◽  
Soo-Yeon Lee ◽  
Young Wook Lee ◽  
Seung-Hee Kuk ◽  
Jang-Yeon Kwon ◽  
...  

2012 ◽  
Vol 2012 ◽  
pp. 1-4 ◽  
Author(s):  
Bradley D. Christiansen ◽  
Eric R. Heller ◽  
Ronald A. Coutu ◽  
Ramakrishna Vetury ◽  
Jeffrey B. Shealy

Reports to date of GaN HEMTs subjected to forward gate bias stress include varied extents of degradation. We report an extremely robust GaN HEMT technology that survived—contrary to conventional wisdom—high forward gate bias (+6 V) and current (>1.8 A/mm) for >17.5 hours exhibiting only a slight change in gate diode characteristic, little decrease in maximum drain current, with only a 0.1 V positive threshold voltage shift, and, remarkably, a persisting breakdown voltage exceeding 200 V.


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