Threshold Voltage Shifts in Amorphous Silicon Thin Film Transistors under Bias Stress
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ABSTRACTThrough the time and temperature dependence measurements on threshold voltage shifts (Δ VT) in amorphous silicon thin film transistors, it has been found that two separate instability mechanisms exist; within short stress time ranges Δ Vτ increases as log t and this behavior corresponds to charge trapping in SiN. On the other hand, in long stress time ranges Δ VT increases as t t/4 and can be explained by time-dependent creation of trap in a-Si.
2000 ◽
Vol 39
(Part 1, No. 10)
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pp. 5763-5766
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2007 ◽
Vol 46
(3B)
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pp. 1318-1321
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1995 ◽
Vol 30
(9)
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pp. 2254-2256
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1992 ◽
Vol 83
(10)
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pp. 833-835
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1991 ◽
Vol 30
(Part 1, No. 12B)
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pp. 3719-3723
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