Analysis and Design of a Modular Switched Capacitor Converter with Adjustable Output Voltage in DC Microgrid

2022 ◽  
pp. 1-1
Author(s):  
Shouheng Han ◽  
Yijie Wang ◽  
Yueshi Guan ◽  
Dianguo Xu
Keyword(s):  
Output Voltage ◽  
Switched Capacitor ◽  
Dc Microgrid ◽  
Analysis And Design ◽  
Switched Capacitor Converter

IMPROVEMENT OF POWER EFFICIENCY AND OUTPUT VOLTAGE RIPPLE OF EMBEDDED DC–DC CONVERTERS WITH THREE STEP DOWN RATIOS

2012 ◽  
Vol 21 (01) ◽  
pp. 1250007 ◽  
Author(s):  
KAUSHIK BHATTACHARYYA ◽  
P. V. RATNA KUMAR ◽  
PRADIP MANDAL
Keyword(s):  
Power Efficiency ◽  
Output Voltage ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Switching Scheme ◽  
Time Interleaving ◽  
Regulation Scheme ◽  
Voltage Ripple ◽  
Switched Capacitor Converter ◽  
On Chip

In this paper three embedded switched capacitor based DC–DC converters targeting Vdd/2, 2Vdd/3, and Vdd/3 output voltages have been designed with improved power efficiency and output voltage ripple. The performance of each of the converter is improved by nonoverlapped rotational time interleaving (NRTI) switching scheme. Current regulation scheme is included with each of the above NRTI switched capacitor converter to achieve better load and line regulation. The proposed converters are designed and simulated in a 0.18 μm n-well CMOS process with the total flying capacitance of 330 pF and load capacitor of 50 pF. The capacitance values are kept within on-chip implementable range. The maximum power efficiency and the output voltage ripple of the integrated NRTI DC–DC converters targeted for Vdd/2, 2Vdd/3 and Vdd/3 output generation are 71.5% and 5 mV, 69.23% and 13.27 mV and 58.09% and 10.5 mV, respectively.

scholarly journals Vertical Stacked LEGO-PoL CPU Voltage Regulator

2021 ◽  
Author(s):  
Minjie Chen
Keyword(s):  
Output Voltage ◽  
Input Voltage ◽  
Voltage Regulator ◽  
Switched Capacitor ◽  
Switched Capacitor Circuits ◽  
Coupled Inductors ◽  
Current Sharing ◽  
Charging Current ◽  
In Series ◽  
Switched Capacitor Converter

<div>This paper presents a 48 V–1 V merged-two-stage hybrid-switched-capacitor converter with a Linear Extendable Group Operated Point-of-Load (LEGO-PoL) architecture for ultra-high-current microprocessors, featuring 3-D stacked packaging and coupled inductors for miniaturized size and vertical power delivery. The architecture is highly modular and scalable. The switched capacitor circuits are connected in series on the input side to split the high input voltage into multiple stacked voltage domains. The multiphase buck circuits are connected in parallel to distribute the high output current into multiple parallel current paths. It leverages the advantages of switched capacitor circuits and multiphase buck circuits to achieve soft charging, current sharing, and voltage balancing. The inductors of the multiphase buck converters are used as current sources to soft-charge and soft-switch the switched-capacitor circuits, and the switched-capacitor circuits are utilized to ensure current sharing among the multiphase buck circuits. A 780 A vertical stacked CPU voltage regulator with a peak efficiency of 91.1% and a full load efficiency of 79.2% at an output voltage of 1 V with liquid cooling is built and tested. This is the first demonstration of a 48 V–1 V CPU voltage regulator to achieve over 1 A/mm2 current density and the first to achieve 1,000 W/in3 power density. It regulates output voltage between 0.8 V and 1.5 V through the entire 780 A current range.</div>

HIGH-EFFICIENCY 2-STAGE MULTIPHASE SWITCHED-CAPACITOR CONVERTER VIA VARIABLE-PHASE AND PWM CONTROL

2010 ◽  
Vol 19 (08) ◽  
pp. 1753-1780
Author(s):  
YUEN-HAW CHANG
Keyword(s):  
Power Efficiency ◽  
Closed Loop ◽  
High Efficiency ◽  
Dynamic Error ◽  
Output Regulation ◽  
Switched Capacitor ◽  
Voltage Gain ◽  
Variable Phase ◽  
Analysis And Design ◽  
Switched Capacitor Converter

A closed-loop scheme of 2-stage multiphase switched-capacitor (MPSC) converter is proposed by combining variable-phase control (VPC) and pulse-width-modulation (PWM) technique for low-power DC-DC step-up conversion and high-efficiency output regulation. In this MPSC, there are 2 voltage doublers in series for boosting voltage gain up to 4 at most. Here, VPC is suggested to improve power efficiency, especially for the lower output voltage. It realizes a variable multiphase operation by changing MPSC topological path for more suitable level of voltage gain (4x/3x/2x/1x) according to the desired output. Besides, PWM is adopted for better output regulation not only to compensate dynamic error, but also to reinforce robustness against source/loading variation. Further, the theoretical analysis and design include: MPSC model, steady-state analysis, power efficiency, conversion ratio, ripple percentage, capacitance selection, stability, and control design. Finally, the closed-loop MPSC is simulated, and the hardware implementation is realized and tested. All the results are illustrated to show the efficacy of the proposed scheme.

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