HIGH-EFFICIENCY 2-STAGE MULTIPHASE SWITCHED-CAPACITOR CONVERTER VIA VARIABLE-PHASE AND PWM CONTROL

2010 ◽  
Vol 19 (08) ◽  
pp. 1753-1780
Author(s):  
YUEN-HAW CHANG
Keyword(s):  
Power Efficiency ◽  
Closed Loop ◽  
High Efficiency ◽  
Dynamic Error ◽  
Output Regulation ◽  
Switched Capacitor ◽  
Voltage Gain ◽  
Variable Phase ◽  
Analysis And Design ◽  
Switched Capacitor Converter

A closed-loop scheme of 2-stage multiphase switched-capacitor (MPSC) converter is proposed by combining variable-phase control (VPC) and pulse-width-modulation (PWM) technique for low-power DC-DC step-up conversion and high-efficiency output regulation. In this MPSC, there are 2 voltage doublers in series for boosting voltage gain up to 4 at most. Here, VPC is suggested to improve power efficiency, especially for the lower output voltage. It realizes a variable multiphase operation by changing MPSC topological path for more suitable level of voltage gain (4x/3x/2x/1x) according to the desired output. Besides, PWM is adopted for better output regulation not only to compensate dynamic error, but also to reinforce robustness against source/loading variation. Further, the theoretical analysis and design include: MPSC model, steady-state analysis, power efficiency, conversion ratio, ripple percentage, capacitance selection, stability, and control design. Finally, the closed-loop MPSC is simulated, and the hardware implementation is realized and tested. All the results are illustrated to show the efficacy of the proposed scheme.

HIGH-GAIN/EFFICIENCY MULTISTAGE SWITCHED-CAPACITOR-VOLTAGE-MULTIPLIER DC–DC CONVERTER

2012 ◽  
Vol 21 (03) ◽  
pp. 1250023
Author(s):  
YUEN-HAW CHANG
Keyword(s):  
Power Efficiency ◽  
Closed Loop ◽  
Pulse Width Modulation ◽  
High Efficiency ◽  
Conversion Ratio ◽  
Switched Capacitor ◽  
Two Phase ◽  
Analysis And Design ◽  
Voltage Multiplier ◽  
Capacitor Voltage

A closed-loop interleaved multistage switched-capacitor-voltage-multiplier (mc × nc-stage SCVM) dc–dc converter is proposed by combining a variable-conversion-ratio (VCR) and pulse-width-modulation (PWM) control for low-power step-up conversion and high-efficiency regulation. In this SCVM, the power part is composed of two mc-stage SC cells (front) and two nc-stage SC cells (rear) in cascade, and these cells are operated by two-phase nonoverlapping clocks for an interleaved operation with voltage gain of mc × nc at most. This paper presents the VCR control to change the running stage number m,n and topological path for a more flexible and suitable gain level m × n (1 × 1, 2 × 1, 2 × 2, 3 × 1, 3 × 2, 3 × 3,…, mc × nc) according to the desired output so as to improve power efficiency, especially for the lower output. Besides, PWM is adopted not only to enhance output regulation for different outputs, but also to reinforce output robustness to source/loading variation. Further, some theoretical analysis and design include: SCVM model, steady-state analysis, conversion ratio, power efficiency, output ripple, stability, capacitance selection, and control design. Finally, the closed-loop SCVM is simulated, and the hardware is implemented and tested. All the results are illustrated to show the efficacy of the proposed scheme.

scholarly journals High Voltage using DC-DC Switched Capacitor Converter for PV Application without Transformer

2019 ◽  
Vol 9 (2S4) ◽  
pp. 431-434
Keyword(s):  
High Voltage ◽  
Electromagnetic Interference ◽  
High Efficiency ◽  
Life Time ◽  
Switched Capacitor ◽  
Voltage Gain ◽  
High Voltage Gain ◽  
Ac Power ◽  
Switched Capacitor Converter ◽  
Current Ripples

In this paper, a DC-DC switched capacitor (SC) converter without using transformer is designed to achieve high voltage gain. Normally a transformer is used for AC-AC power conversion with step up or step down operation without changing the frequency. But it occupies more space due to its size and weight. Therefore, switched capacitor is used for achieving high voltage combine with converter, in order to avoid the transformer due to more expensive and losses. The traditional converter consists of more switches and stresses as well as losses with converter. In proposed converter, it uses fewer amounts of switches and gives high efficiency to increase the voltage gain. The current ripples are filtered that help to device life time and also reduce the electromagnetic interference. The designed converter is analyzed and the voltage is attained using MATLAB/Simulink.

scholarly journals SiC-Based Bidirectional Multilevel High-Voltage Gain Switched-Capacitor Resonant Converter with Improved Efficiency

Energies ◽  
2020 ◽  
Vol 13 (10) ◽  
pp. 2445 ◽  
Author(s):  
Adam Kawa ◽  
Robert Stala
Keyword(s):  
High Voltage ◽  
Power Efficiency ◽  
Switched Capacitor ◽  
Voltage Gain ◽  
Laboratory Equipment ◽  
Voltage Range ◽  
Laboratory Setup ◽  
High Voltage Gain ◽  
Switched Capacitor Converter ◽  
Proposed Modification

This paper presents the research results of the bidirectional multilevel resonant switched capacitor converter (MRSCC). The converter can achieve a high voltage ratio in multilevel topology, which limits the voltage stress on switches and is able to operate with high power efficiency. The converter can be applied as an interconnector between DC voltage systems used for various applications. This paper presents a method that significantly improves the efficiency of the MSRCC through topology modification. Furthermore, the feasibility of the converter was demonstrated with the use of SiC and Si MOSFET switches, together with suitable passive components. It was demonstrated that the proposed modification of the topology makes the converter very efficient in SiC-based ones and can significantly improve the efficiency of Si MOSFET converters. The series of test results of the SiC-based converter is a novel aspect presented in this paper and shows promising achievements of efficiency. The results were obtained from the laboratory setup of 5 kW and 0.5/2 kV MRSCC. To demonstrate the bidirectional operation of the converter, a back-to-back setup (0.5/2/0.5 kV) was used. It also demonstrates that such a high-voltage gain converter can be accurately tested with the use of laboratory equipment with a typical voltage range.

scholarly journals Performance Analysis and Design Optimization of Parallel-Type Slew-Rate Enhancers for Switched-Capacitor Applications

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1949
Author(s):  
Alessandro Catania ◽  
Mattia Cicalini ◽  
Michele Dei ◽  
Massimo Piotto ◽  
Paolo Bruschi
Keyword(s):  
Power Efficiency ◽  
Settling Time ◽  
Current Gain ◽  
Design Parameters ◽  
Switched Capacitor ◽  
Slew Rate ◽  
Simple Modification ◽  
Analysis And Design ◽  
Time Reduction ◽  
Parallel Type

The design of single-stage OTAs for accurate switched-capacitor circuits involves challenging trade-offs between speed and power consumption. The addition of a Slew-Rate Enhancer (SRE) circuit placed in parallel to the main OTA (parallel-type SRE) constitutes a viable solution to reduce the settling time, at the cost of low-power overhead and no modifications of the main OTA. In this work, a practical analytical model has been developed to predict the settling time reduction achievable with OTA/SRE systems and to show the effect of the various design parameters. The model has been applied to a real case, consisting of the combination of a standard folded-cascode OTA with an existing parallel-type SRE solution. Simulations performed on a circuit designed with a commercial 180-nm CMOS technology revealed that the actual settling-time reduction was significantly smaller than predicted by the model. This discrepancy was explained by taking into account the internal delays of the SRE, which is exacerbated when a high output current gain is combined with high power efficiency. To overcome this problem, we propose a simple modification of the original SRE circuit, consisting in the addition of a single capacitor which temporarily boosts the OTA/SRE currents reducing the internal turn-on delay. With the proposed approach a settling-time reduction of 57% has been demonstrated with an SRE that introduces only a 10% power-overhead with respect of the single OTA solution. The robustness of the results have been validated by means of Monte-Carlo simulations.

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