The square checkerboard buckling deformation appearing in indium antimonide infrared focal-plane arrays
(InSb IRFPAs) subjected to the thermal shock tests, results in the fracturing of the InSb chip, which restricts its final yield.
In light of the proposed three-dimensional modeling, we proposed the method of thinning a silicon readout integrated circuit
(ROIC) to level the uneven top surface of InSb IRFPAs. Simulation results show that when the silicon ROIC is thinned from 300 μm to 20 μm, the maximal displacement in the InSb IRFPAs linearly decreases from 7.115 μm to 0.670 μm in the upward direction, and also decreases linearly from 14.013 μm to 1.612 μm in the downward direction. Once the thickness of the silicon ROIC is less than 50 μm, the square checkerboard buckling deformation distribution presenting in the thicker InSb IRFPAs disappears, and the top surface of the InSb IRFPAs becomes flat. All these findings imply that
the thickness of the silicon ROIC determines the degree of deformation in the InSb IRFPAs under a thermal shock test,
that the method of thinning a silicon ROIC is suitable for decreasing the fracture probability of the InSb chip, and that this
approach improves the reliability of InSb IRFPAs.
Fabrication of 15-$\mu$ m Pitch $640\times512$ InAs/GaSb Type-II Superlattice Focal Plane Arrays
