Experimental and Simulation Results of Magnetic Modulation of Gate Oxide Tunneling Current in Nanoscaled MOS Transistors

2015 ◽  
Vol 36 (4) ◽  
pp. 387-389 ◽  
Author(s):  
Gabriela A. Rodriguez-Ruiz ◽  
Edmundo A. Gutierrez-Dominguez ◽  
Arturo Sarmiento-Reyes ◽  
Zlatan Stanojevic ◽  
Hans Kosina ◽  
...  
Keyword(s):  
Tunneling Current ◽  
Gate Oxide ◽  
Mos Transistors ◽  
Simulation Results ◽  
Gate Oxide Tunneling

The Effect of Roughness Features on Mos Surface Electric Field and Fowler-Nordheim Tunneling Behavior

1997 ◽  
Vol 473 ◽  
Author(s):  
Heng-Chih Lin ◽  
Edwin C. Kan ◽  
Toshiaki Yamanaka ◽  
Simon J. Fang ◽  
Kwame N. Eason ◽  
...  
Keyword(s):  
Electric Field ◽  
Three Dimensional ◽  
Tunneling Current ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Interface Roughness ◽  
Normal Electric Field ◽  
Surface Electric Field ◽  
Tunneling Behavior ◽  
Nordheim Tunneling

ABSTRACTFor future CMOS GSI technology, Si/SiO2 interface micro-roughness becomes a non-negligible problem. Interface roughness causes fluctuations of the surface normal electric field, which, in turn, change the gate oxide Fowler-Nordheim tunneling behavior. In this research, we used a simple two-spheres model and a three-dimensional Laplace solver to simulate the electric field and the tunneling current in the oxide region. Our results show that both quantities are strong functions of roughness spatial wavelength, associated amplitude, and oxide thickness. We found that RMS roughness itself cannot fully characterize surface roughness and that roughness has a larger effect for thicker oxide in terms of surface electric field and tunneling behavior.

scholarly journals Local Thinning-Induced Oxide Nonuniformity Effect on the Tunneling Current of Ultrathin Gate Oxide

2002 ◽  
Vol 41 (Part 1, No. 1) ◽  
pp. 1-4 ◽  
Author(s):  
Chao-Chi Hong ◽  
Wei-Ren Chen ◽  
Jenn-Gwo Hwu
Keyword(s):  
Tunneling Current ◽  
Gate Oxide

Gate Tunneling Current Predicting Model for Scaled NMOSFET Devices

2013 ◽  
Vol 772 ◽  
pp. 422-426
Author(s):  
Zhi Chao Zhao ◽  
Tie Feng Wu ◽  
Hui Bin Ma ◽  
Quan Wang ◽  
Jing Li
Keyword(s):  
Tunneling Current ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Integral Approach ◽  
Predicting Model ◽  
Mos Devices ◽  
Gate Oxide Thickness ◽  
Novel Theory ◽  
Gate Tunneling ◽  
Thin Gate Oxide

With the scaling of MOS devices, gate tunneling current increases significantly due to thinner gate oxides, and static characteristics of devices and circuit are severely affected by the presence of gate tunneling currents. In this paper, a novel theory gate tunneling current predicting model using integral approach is presented in ultra-thin gate oxide MOS devices that tunneling current changes with gate-oxide thickness. To analyze quantitatively the behaviors of scaled MOS devices in the effects of gate tunneling current and predict the trends, the characteristics of MOS devices are studied in detail using HSPICE simulator. The simulation results in BSIM4 model well agree with the model proposed. The theory and experiment data are contributed to the VLSI circuit design in the future.

scholarly journals Nanopore-Based DNA Analysis via Graphene Electrodes

2012 ◽  
Vol 2012 ◽  
pp. 1-5 ◽  
Author(s):  
Qing Zhao ◽  
Yang Wang ◽  
Jianjin Dong ◽  
Lina Zhao ◽  
X. F. Rui ◽  
...  
Keyword(s):  
Genome Sequencing ◽  
Dna Analysis ◽  
Low Cost ◽  
Tunneling Current ◽  
Single Atom ◽  
Simulation Results

We propose an improvement for nanopore-based DNA analysis via transverse transport using graphene as transverse electrodes. Our simulation results show conspicuous distinction of tunneling current during translocation of different nucleotides through nanopore. Applying the single-atom thickness property of graphene, our findings demonstrate the feasibility of using graphene as transverse electrodes in future rapid and low-cost genome sequencing.

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