A low-voltage low-power CMOS opamp with rail-to-rail input/output

Author(s):  
Chi-Hung Lin ◽  
M. Ismail
2013 ◽  
Vol 60 (9) ◽  
pp. 2333-2342 ◽  
Author(s):  
Cristina Azcona ◽  
Belen Calvo ◽  
Santiago Celma ◽  
Nicolas Medrano ◽  
Pedro A. Martinez

2016 ◽  
Vol 48 ◽  
pp. 60-75 ◽  
Author(s):  
Ahmed Reda ◽  
Mohamed F. Ibrahim ◽  
Fathi Farag

Author(s):  
M.R. Valero ◽  
S. Celma ◽  
N. Medrano

This paper presents an ultra low power rail-to-rail input/output operational amplifier (OpAmp) designed in a low cost 0.18 μm CMOS technology. In this OpAmp, rail-to-rail input operation is enabled by using complementary input pairs with gm control. To maximize the output swing a rail-to-rail output stage is employed. For low-voltage low-power operation, the operating transistors in the input and output stage are biased in the sub-threshold region. The simulated DC open loop gain is 51 dB, and the slew-rate is 0.04 V/μs with a 10 pF capacitive load connected to each of the amplifier outputs. For the same load, the simulated unity gain frequency is 131 kHz with a 64º phase margin. A common-mode feed-forward circuit (CMFF) increases CMRR, reducing drastically the variations in the output common mode voltage and keeping the DC gain almost constant. In fact, their relative error remains below 1.2 % for a (-20ºC, +120ºC) temperature span. In addition, the proposed OpAmp is very simple and consumes only 4 μW at 0.8 V supply.


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