Operational transconductance amplifier-based comparator for high frequency applications using 22 nm FinFET technology

<p><span>Fin field-effect transistor (FinFET) based analog circuits are gaining importance over metal oxide semiconductor field effect transistor (MOSFET) based circuits with stability and high frequency operations. Comparator that forms the sub block of most of the analog circuits is designed using operational transconductance amplifier (OTA). The OTA is designed using new design procedures and the comparator circuit is designed integrating the sub circuits with OTA. The building blocks of the comparator design such as input level shifter, differential pair with cascode stage and class AB amplifier for output swing are designed and integrated. Folded cascode circuit is used in the feedback path to maintain the common mode input value to a constant, so that the differential pair amplifies the differential signal. The gain of the comparator is achieved to be greater than 100 dB, with phase margin of 65°, common mode rejection ratio (CMRR) of above 70 dB and output swing from rail to rail. The circuit provides unity gain bandwidth of 5 GHz and is suitable for high sampling rate data converter circuits.</span></p>

Inductanceless high order low frequency filters for medical applications

<p>In this paper, a designed circuit used for low-frequency filters is implemented and realized the filter is based on frequency-dependent negative resistance (FDNR) as an inductor simulator to substitute the traditional inductance, which is heavy and high cost due to the coil material manufacturing and size area. The simulator is based on an active operation amplifier or operation transconductance amplifier (OTA) that is easy to build in an integrated circuit with a minimum number of components. The third and higher-order Butterworth filter is simulated at low frequency for low pass filter to use in medical instruments and low-frequency applications. The designed circuit is compared with the traditional proportional integral controller enhanced (PIE) and T section ordinary filter. The results with magnitude and phase response were compared and an acceptable result is obtained. The filter can be used for general applications such as medical and other low-frequency filters needed.</p>

The voltage-mode first order universal filter using single voltage differencing differential input buffered amplifier with electronic controllability

In this research contribution, the electronically tunable first-order universal filter employing a single voltage differencing differential input buffered amplifier (VD-DIBA) (constructed from two commercially available integrated circuit (IC): the operational transconductance amplifier, IC number LT1228, and the differential voltage input buffer, IC number AD830), one capacitor and two resistors. The features of the designed first order universal filter are as follows. Three voltage-mode first-order functions, low-pass (LP), all-pass (AP) and high-pass (HP) responses are given. The natural frequency (𝜔0) of the presented configuration can be electronically adjusted by setting the DC bias current. Moreover, the voltage gain of the LP and HP filters can be controllable. The phase responses of an AP configuration can be varied from 00 to −1800 and 1800 to 00. The power supply voltages were set at ±5 𝑉. Verification of the theoretically described performances of the introduced electronically tunable universal filter was proved by the PSpice simulation and experiment.

Design and Implementation of High Speed and Low Power 12-bit SAR ADC using 22nm FinFET

Successive Approximation Register (SAR) Analog to Digital Converter (ADC) architecture comprises of sub modules such as comparator, Digital to Analog Converter and SAR logic. Each of these modules imposes challenges as the signal makes transition from analog to digital and vice-versa. Design strategies for optimum design of circuits considering 22nm FinFET technology meeting area, timing, power requirements and ADC metrics is presented in this work. Operational Transconductance Amplifier (OTA) based comparator, 12-bit two stage segmented resistive string DAC architecture and low power SAR logic is designed and integrated to form the ADC architecture with maximum sampling rate of 1 GS/s. Circuit schematic is captured in Cadence environment with optimum geometrical parameters and performance metrics of the proposed ADC is evaluated in MATLAB environment. Differential Non Linearity and Integral Non Linearity metrics for the 12-bit ADC is limited to +1.15/-1 LSB and +1.22/-0.69 LSB respectively. ENOB of 10.1663 with SNR of 62.9613 dB is achieved for the designed ADC measured for conversion of input signal of 100 MHz with 20dB noise. ADC with sampling frequency upto 1 GSps is designed in this work with low power dissipation less than 10 mW.

Electronically Adjustable Grounded Memcapacitor Emulator Based on Single Active Component with Variable Switching Mechanism

New current mode grounded memcapacitor emulator circuits are reported in this paper, based on a single voltage differencing transconductance amplifier-VDTA and two grounded capacitors. The proposed circuits possess a single active component matching constraint, while the MOS-capacitance can be used instead of classical capacitance in a situation involving the simulator working within a high frequency range of up to 50 MHz, thereby offering obvious benefits in terms of realization utilising an IC-integrated circuit. The proposed emulator offers a variable switching mechanism—soft and hard—as well as the possibility of generating a negative memcapacitance characteristic, depending on the value of the frequency of the input current signal and the applied capacitance. The influence of possible non-ideality and parasitic effects was analysed, in order to reduce their side effects and bring the outcome to acceptable limits through the selection of passive elements. For the verification purposes, a PSPICE simulation environment with CMOS 0.18 μm TSMC technology parameters was selected. An experimental check was performed with off-the-shelf components-IC MAX435, showing satisfactory agreement with theoretical assumptions and conclusions.

Design of high speed 2-stage OTA for high capacitive load of 120pF and 2.96V

High speed operational transconductance amplifier (OTA) is used to drive high capacitive loads to reduce the charging time while providing adequate gain and stability. A 2-stage amplifier is proposed to provide high slew rate and sufficient gain and stability. 45nm process technology is used to compare performance with differential and telescopic amplifier designs. Resistive feedback and noise-gain compensation techniques are used to drive 120pF load and provide 2.96V at output for a high slew rate of 2.2V/µs.