A C-band low power high dynamic range GaAs MESFET low noise amplifier

Author(s):  
S. Yoo ◽  
D. Heo ◽  
J. Laskar ◽  
S.S. Taylor
2004 ◽  
Vol 14 (6) ◽  
pp. 262-264 ◽  
Author(s):  
Hongtao Xu ◽  
C. Sanabria ◽  
A. Chini ◽  
S. Keller ◽  
U.K. Mishra ◽  
...  

2017 ◽  
Vol 64 (8) ◽  
pp. 3199-3205 ◽  
Author(s):  
Cheng Ma ◽  
Yang Liu ◽  
Yang Li ◽  
Quan Zhou ◽  
Xinyang Wang ◽  
...  

2021 ◽  
Author(s):  
Rafael Vieira ◽  
Nuno Horta ◽  
Nuno Lourenço ◽  
Ricardo Póvoa

1970 ◽  
Vol 6 (7) ◽  
pp. 202
Author(s):  
J.R. Collard ◽  
A.R. Gobat

2021 ◽  
Vol 3 (4) ◽  
Author(s):  
S. Chrisben Gladson ◽  
Adith Hari Narayana ◽  
V. Thenmozhi ◽  
M. Bhaskar

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.


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