scholarly journals A 30-dBm Class-D Power Amplifier with On/Off Logic for an Integrated Tri-Phasing Transmitter in 28-nm CMOS

Author(s):  
Mikko Martelius ◽  
Kari Stadius ◽  
Jerry Lemberg ◽  
Enrico Roverato ◽  
Tero Nieminen ◽  
...  
Keyword(s):  
Class D ◽  
Author(s):  
Mehrdad Harifi-Mood ◽  
Abolfazl Bijari ◽  
Hossein Alizadeh ◽  
Mehdi Forouzanfar ◽  
Nabeeh Kandalaft

2007 ◽  
Vol 38 (3) ◽  
pp. 439-446 ◽  
Author(s):  
Thomas Johnson ◽  
Robert Sobot ◽  
Shawn Stapleton

Author(s):  
Mikkel Hoyerby ◽  
Jorgen Kragh Jakobsen ◽  
Jesper Midtgaard ◽  
Thomas Holm Hansen ◽  
Allan Nogueras Nielsen ◽  
...  
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Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.


Author(s):  
Ao Ba ◽  
Vamshi Krishna Chillara ◽  
Yao-Hong Liu ◽  
Hiromu Kato ◽  
Kathleen Philips ◽  
...  
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