A complementary bipolar technology on SOI featuring 50 GHz NPN and 35 GHz PNP devices for high performance RF applications

Author(s):  
Nigrin ◽  
Wilson ◽  
Thomas ◽  
Connor ◽  
Osborne
2001 ◽  
Vol 48 (11) ◽  
pp. 2514-2519 ◽  
Author(s):  
J. Bock ◽  
H. Knapp ◽  
K. Aufinger ◽  
T.F. Meister ◽  
M. Wurzer ◽  
...  

1993 ◽  
Vol 04 (03) ◽  
pp. 283-299
Author(s):  
T. M. LIU ◽  
R. G. SWARTZ ◽  
T.Y. CHIU

With the increasing maturity of conventional Bipolar-CMOS (BiCMOS) technologies, a new category of BiCMOS called "ECL-BiCMOS" or high performance BiCMOS technology has emerged. These ECL-BiCMOS technologies offer not only high density CMOS capability, but also feature high speed bipolar devices for emitter couple logic (ECL) and mixed analog/digital applications. Since many process requirements of advanced bipolar technology differ from those of CMOS, to fabricate high speed bipolar devices without compromising CMOS performance is the primary challenge. In this paper, we discuss key process integration issues and review various approaches. In particular, we describe a recently developed half-micron super self-aligned BiCMOS technology. Together with high density/high speed CMOS, multi-GHz communication bipolar circuit results are presented to show the potential of high performance BiCMOS technology.


Author(s):  
Warnock ◽  
Cressler ◽  
Burghartz ◽  
Harame ◽  
Jenkins ◽  
...  

1998 ◽  
Vol 19 (4) ◽  
pp. 103-105 ◽  
Author(s):  
J.N. Burghartz ◽  
J.-O. Plouchart ◽  
K.A. Jenkins ◽  
C.S. Webster ◽  
M. Soyuer

1991 ◽  
Vol 12 (6) ◽  
pp. 315-317 ◽  
Author(s):  
J. Warnock ◽  
J.D. Cressler ◽  
K.A. Jenkins ◽  
C. Stanis ◽  
J.Y.C. Sun ◽  
...  

1987 ◽  
Vol 34 (11) ◽  
pp. 2246-2254 ◽  
Author(s):  
G.P. Li ◽  
T.H. Ning ◽  
C.T. Chuang ◽  
M.B. Ketchen ◽  
D.D.-L. Tang ◽  
...  

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