An Accurate Physics-Based Compact Model for Dual-Gate Bilayer Graphene FETs

2015 ◽  
Vol 62 (12) ◽  
pp. 4333-4339 ◽  
Author(s):  
Jorge-Daniel Aguirre-Morales ◽  
Sebastien Fregonese ◽  
Chhandak Mukherjee ◽  
Cristell Maneux ◽  
Thomas Zimmer
Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 63
Author(s):  
Saima Hasan ◽  
Abbas Z. Kouzani ◽  
M A Parvez Mahmud

This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene channel by using equivalent circuit modeling. Additionally, the closed-form analytical equations for the drain current and drain-to-source voltage dependence on the drain current were investigated. The distribution of drain current with voltages in three regions (triode, unipolar saturation, and ambipolar) was plotted. The modeling results exhibited better output characteristics, transfer function, and transconductance behavior for GFET compared to FETs. The transconductance estimation as a function of gate voltage for different drain-to-source voltages depicted a proportional relationship; however, with the increase of gate voltage this value tended to decline. In the case of transit frequency response, a decrease in channel length resulted in an increase in transit frequency. The threshold voltage dependence on back-gate-source voltage for different dielectrics demonstrated an inverse relationship between the two. The analytical expressions and their implementation through graphical representation for a bilayer graphene channel will be extended to a multilayer channel in the future to improve the device performance.


2021 ◽  
Vol 68 (4) ◽  
pp. 2049-2055
Author(s):  
Jingrui Guo ◽  
Ying Zhao ◽  
Guanhua Yang ◽  
Xichen Chuai ◽  
Wenhao Lu ◽  
...  

2019 ◽  
Vol 28 (14) ◽  
pp. 1950241
Author(s):  
Sudipta Bardhan ◽  
Manodipan Sahoo ◽  
Hafizur Rahaman

In this work, a surface potential modeling approach has been proposed to model dual gate, bilayer graphene field effect transistor. The equivalent capacitive network of GFET has been improved considering the quantum capacitance effect for each layer and interlayer capacitances. Surface potentials of both layers are determined analytically from equivalent capacitive network. The explicit expression of drain to source current is established from drift-diffusion transport mechanism using the surface potentials of the layers. The drain current characteristics and transfer characteristics of the developed model shows good agreement with the experimental results in literatures. The small signal parameters of intrinsic graphene transistor i.e., output conductance ([Formula: see text]), transconductance ([Formula: see text]), gate to drain capacitance ([Formula: see text]) and gate to source capacitance ([Formula: see text]) have been derived and finally, the cut-off frequency is determined for the developed model. The model is compared with reported experimental data using Normalized Root Mean Square Error (NRMSE) metric and it shows less than [Formula: see text] NRMSE. A Verilog-A code has been developed for this model and a single ended frequency doubler has been designed in Cadence Design environment using this Verilog-A model.


2011 ◽  
Vol 84 (11) ◽  
Author(s):  
J. E. Padilha ◽  
Matheus P. Lima ◽  
Antônio J. R. da Silva ◽  
A. Fazzio
Keyword(s):  

Nano Letters ◽  
2021 ◽  
Author(s):  
Weiwei Luo ◽  
Alexey B. Kuzmenko ◽  
Jialin Qi ◽  
Ni Zhang ◽  
Wei Wu ◽  
...  
Keyword(s):  

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