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Application of deterministic logic BIST on industrial circuits
Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159)
◽
10.1109/test.2000.894197
◽
2002
◽
Cited By ~ 52
Author(s):
G. Kiefer
◽
H. Vranken
◽
E.J. Marinissen
◽
H.-J. Wunderlich
Keyword(s):
Logic Bist
◽
Industrial Circuits
Download Full-text
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References
On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST
2013 22nd Asian Test Symposium
◽
10.1109/ats.2013.14
◽
2013
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Cited By ~ 1
Author(s):
A. Tomita
◽
X. Wen
◽
Y. Sato
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S. Kajihara
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P. Girard
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...
Keyword(s):
Logic Bist
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Power Safety
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Directed-binary search in logic BIST diagnostics
Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition
◽
10.1109/date.2002.998477
◽
2003
◽
Cited By ~ 4
Author(s):
R. Kapur
◽
T.W. Williams
◽
M.R. Mercer
Keyword(s):
Binary Search
◽
Logic Bist
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Verifying Very Large Industrial Circuits Using 100 Processes and Beyond
Automated Technology for Verification and Analysis - Lecture Notes in Computer Science
◽
10.1007/11562948_4
◽
2005
◽
pp. 11-25
◽
Cited By ~ 1
Author(s):
Limor Fix
◽
Orna Grumberg
◽
Amnon Heyman
◽
Tamir Heyman
◽
Assaf Schuster
Keyword(s):
Industrial Circuits
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Design and Implementation of Power Efficient Logic BIST With High Fault Coverage Using Verilog
2018 International Conference on Networking, Embedded and Wireless Systems (ICNEWS)
◽
10.1109/icnews.2018.8903923
◽
2018
◽
Author(s):
K Akhila
◽
N Karuna
◽
Yasha Jyothi M Shirur
Keyword(s):
Fault Coverage
◽
Power Efficient
◽
Design And Implementation
◽
Logic Bist
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Resistive bridging fault simulation of industrial circuits
2008 Design, Automation and Test in Europe
◽
10.1145/1403375.1403527
◽
2008
◽
Cited By ~ 1
Author(s):
Piet Engelke
◽
Ilia Polian
◽
Juergen Schloeffel
◽
Bernd Becker
Keyword(s):
Fault Simulation
◽
Bridging Fault
◽
Industrial Circuits
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Automatic test pattern generation for industrial circuits with restrictors
Microelectronics Journal
◽
10.1016/0026-2692(95)00005-3
◽
1995
◽
Vol 26
(7)
◽
pp. 635-645
◽
Cited By ~ 7
Author(s):
M.H. Konijnenburg
◽
J.Th. van der Linden
◽
A.J. van de Goor
Keyword(s):
Test Pattern
◽
Pattern Generation
◽
Test Pattern Generation
◽
Automatic Test Pattern Generation
◽
Automatic Test
◽
Industrial Circuits
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At-speed logic BIST using a frozen clock testing strategy
Proceedings International Test Conference 2001 (Cat. No.01CH37260)
◽
10.1109/test.2001.966619
◽
2002
◽
Cited By ~ 1
Author(s):
Jongshin Shin
◽
Xiaoming Yu
◽
E.M. Rudnick
◽
M. Abramovici
Keyword(s):
Testing Strategy
◽
Logic Bist
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A Flexible Power Control Method for Right Power Testing of Scan-Based Logic BIST
2016 IEEE 25th Asian Test Symposium (ATS)
◽
10.1109/ats.2016.59
◽
2016
◽
Cited By ~ 1
Author(s):
Takaaki Kato
◽
Senling Wang
◽
Yasuo Sato
◽
Seiji Kajihara
◽
Xiaoqing Wen
Keyword(s):
Power Control
◽
Control Method
◽
Logic Bist
◽
Power Testing
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Practical Challenges in Logic BIST Implementation Case Studies
2008 17th Asian Test Symposium
◽
10.1109/ats.2008.59
◽
2008
◽
Cited By ~ 1
Author(s):
Shianling Wu
◽
Hiroshi Furukawa
◽
Boryau Sheu
◽
Laung-Terng Wang
◽
Hao-Jan Chao
◽
...
Keyword(s):
Case Studies
◽
Logic Bist
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Novel approach to reduce power droop during scan-based logic BIST
2013 18TH IEEE EUROPEAN TEST SYMPOSIUM (ETS)
◽
10.1109/ets.2013.6569375
◽
2013
◽
Cited By ~ 1
Author(s):
M. Omana
◽
D. Rossi
◽
F. Fuzzi
◽
C. Metra
◽
C. Tirumurti
◽
...
Keyword(s):
Novel Approach
◽
Logic Bist
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