Impact of Parasitic and Load Current on the Attenuation of Motor Terminal Overvoltage in SiC-Based Drives

Battery applications, such as electric vehicles, electric propulsion ships, and energy storage systems, are developing rapidly, and battery management issues are gaining attention. In this application field, a battery system with a high capacity and high power in which numerous battery cells are connected in series and parallel is used. Therefore, research on a battery management system (BMS) to which various algorithms are applied for efficient use and safe operation of batteries is being conducted. In general, maintenance/replacement of multi-series/multiple parallel battery systems is only possible when there is no load current, or the entire system is shut down. However, if the circulating current generated by the voltage difference between the newly added battery and the existing battery pack is less than the allowable current of the system, the new battery can be connected while the system is running, which is called hot swapping. The circulating current generated during the hot-swap operation is determined by the battery’s state of charge (SOC), the parallel configuration of the battery system, temperature, aging, operating point, and differences in the load current. Therefore, since there is a limit to formulating a circulating current that changes in size according to these various conditions, this paper presents a circulating current estimation method, using an artificial neural network (ANN). The ANN model for estimating the hot-swap circulating current is designed for a 1S4P lithium battery pack system, consisting of one series and four parallel cells. The circulating current of the ANN model proposed in this paper is experimentally verified to be able to estimate the actual value within a 6% error range.

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Load Current and State of Charge Co-Estimation for Current Sensor-Free Lithium-ion Battery

IEEE Transactions on Power Electronics ◽

10.1109/tpel.2021.3068725 ◽

2021 ◽

pp. 1-1

Author(s):

Zhongbao GAE Wei ◽

Jian Hu ◽

Hongwen He ◽

Yang Li ◽

Binyu Xiong

Keyword(s):

Lithium Ion Battery ◽

Lithium Ion ◽

State Of Charge ◽

Current Sensor ◽

Load Current

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Study on System Loss in Distribution Network with DG

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.672-674.1085 ◽

2014 ◽

Vol 672-674 ◽

pp. 1085-1089

Author(s):

Jia Meng ◽

Zai Lin Piao ◽

Feng Zhou

Keyword(s):

Theoretical Analysis ◽

Real Number ◽

Distribution System ◽

Distribution Network ◽

Output Current ◽

Load Current ◽

Radial Distribution System ◽

Operation Optimization ◽

Voltage Deviation ◽

Node Voltage

The access of DG changes the operation and structure of traditional distribution network. This study mainly focused on controlling DG output current to reduce network loss of the system. Select a simple radial distribution system as example for theoretical analysis and derive the expressions of load current and node voltage. Assuming that there exists a real number k between DG output current and load. Then list the network loss and voltage deviation expressions. For the purpose of operation optimization, k can be determined by mathematical calculations. It proves that the method has a certain rationality to be effective in controlling network loss.

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Self-Reduction Quiescent Current Low Power Low Dropout Regulator for SoC Application

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.591-593.2632 ◽

2012 ◽

Vol 591-593 ◽

pp. 2632-2635

Author(s):

Lee Chu Liang ◽

Roslina Mohd Sidek

Keyword(s):

Low Power ◽

Process Model ◽

High Efficiency ◽

System Stability ◽

Cmos Process ◽

Output Impedance ◽

Load Current ◽

Output Load ◽

Quiescent Current ◽

Low Dropout Regulator

A low power low-dropout (LDO) voltage regulator with self-reduction quiescent current is proposed in this paper. This proposed capacitorless LDO for Silicon-on-Chip (SoC) application has introduced a self-adjustable low-impedance circuitry at the output of LDO to attain stability critically during low output load current (less than a few hundred of micro-ampere). When the LDO load current increases, it reduces the LDO output impedance and moved the pole towards higher frequency away from the dominant pole and improving the system stability. When this happen, less amount of quiescent current is needed for the low-impedance circuitry to sustain the low output impedance. In this proposed LDO, the quiescent current that been used to sustain the low output impedance will be self-reduced when the output load current increases. Thus, the reduction of quiescent current at low output load current has tremendously improved the efficiency. The simulation results have shown a promising stability at low load current 0~1mA. The dropout voltage for this LDO is only 100mV at 1.2V supply. The proposed LDO is validated using Silterra 0.13μm CMOS process model and designed with high efficiency at low output load current.

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