Effect on temperature and time in parallel test scheduling with alterations in layers arrangements of 3D stacked SoCs

Author(s):  
Indira Rawat ◽  
M. K. Gupta ◽  
Virendra Singh
2012 ◽  
Vol 591-593 ◽  
pp. 2478-2481
Author(s):  
Lian Chen ◽  
Ming Qing Xiao ◽  
Hang Yu ◽  
Liang Liang Zhao

Parallel test is the key technology of the NxTest technology and the parallel test tasks scheduling is one of the important part of parallel test. The mathematical model of the problem was introduced, according to the advantage of solving the problem of dynamic scheduling with artificial bee colony algorithm; an approach of parallel test scheduling based on artificial bee colony algorithm is brought forward. An example was given, the result of simulation shows that this algorithm’s constringency fast and the result has a high precision, it is an efficient way of solving the problem of optimized parallel test tasks scheduling.


2020 ◽  
pp. 1-13
Author(s):  
Gokul Chandrasekaran ◽  
P.R. Karthikeyan ◽  
Neelam Sanjeev Kumar ◽  
Vanchinathan Kumarasamy

Test scheduling of System-on-Chip (SoC) is a major problem solved by various optimization techniques to minimize the cost and testing time. In this paper, we propose the application of Dragonfly and Ant Lion Optimization algorithms to minimize the test cost and test time of SoC. The swarm behavior of dragonfly and hunting behavior of Ant Lion optimization methods are used to optimize the scheduling time in the benchmark circuits. The proposed algorithms are tested on p22810 and d695 ITC’02 SoC benchmark circuits. The results of the proposed algorithms are compared with other algorithms like Ant Colony Optimization, Modified Ant Colony Optimization, Artificial Bee Colony, Modified Artificial Bee Colony, Firefly, Modified Firefly, and BAT algorithms to highlight the benefits of test time minimization. It is observed that the test time obtained for Dragonfly and Ant Lion optimization algorithms is 0.013188 Sec for D695, 0.013515 Sec for P22810, and 0.013432 Sec for D695, 0.013711 Sec for P22810 respectively with TAM Width of 64, which is less as compared to the other well-known optimization algorithms.


Author(s):  
Tomonori Sasaki ◽  
Yoshiyuki Nakamura ◽  
Toshiharu Asaka
Keyword(s):  

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