Test response reuse-based SoC core test compression and test scheduling for test application time minimization

2008 ◽  
Vol 39 (12) ◽  
pp. 1704-1709
Author(s):  
Jingbo Shao ◽  
Guangsheng Ma ◽  
Zhi Yang ◽  
Ruixue Zhang
2006 ◽  
Vol 15 (03) ◽  
pp. 331-349 ◽  
Author(s):  
HAIDAR M. HARMANANI ◽  
HASSAN A. SALAMY

This paper presents an efficient approach for the test scheduling problem of core-based systems based on a genetic algorithm. The method minimizes the overall test application time of a system-on-a-chip through efficient and compact test schedules. The problem is solved using a "sessionless" scheme that minimizes the number of idle test slots. The method can handle SOC test scheduling with and without power constraints. We present experimental results for various SOC examples that demonstrate the effectiveness of our method. The method achieved optimal test schedules in all attempted cases in a short CPU time.


2009 ◽  
Vol E92-D (7) ◽  
pp. 1462-1465 ◽  
Author(s):  
Yongjoon KIM ◽  
Myung-Hoon YANG ◽  
Jaeseok PARK ◽  
Eunsei PARK ◽  
Sungho KANG

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