Low Power Restoration Circuits Reduce Swing Voltages of SRAM Cell With Improved Read and Write Margins

This paper examines the factors that affect the static noise margin (SNM) of static random access memories which focus on optimizing read and write operation of 8T SRAM cell which is better than 6T SRAM cell using swing restoration for dual node voltage. New 8T SRAM technique on the circuit or architecture level is required. In this paper, comparative analysis of 6T and 8T SRAM cells with improved read and write margin is done for 130nm technology with cadence virtuoso schematics tool.

Compact 1-Bit Full Adder and 2-Bit SRAMs Using n-SWS-FETs

This paper presents Spatial Wavefunction Switched (SWS)-FETs have been proposed to implement ternary and quaternary logic, 2-bit DRAM cells, and static random-access memories (SRAMs) in nMOS-SWS and CMOS-SWS configurations. This paper presents simulation of a 1-bit Full Adder using n-SWS-FETs. In addition, simulation of 2-bit SRAMs is presented for a quantum dot channel and a four quantum well nSWS-FET.SRAMs.

A Comparative Study of 6T and 8T SRAM Cell With Improved Read and Write Margins in 130 nm CMOS Technology

This paper examines the factors that affect the Static Noise Margin (SNM) of a Static Random Access memories which focus on optimizing Read and Write operation of 8T SRAM cell which is better than 6T SRAM cell Using Swing Restoration for Dual Node Voltage. The read and Write time and improve Stability. New 8T SRAM technique on the circuit or architecture level is required. In this paper Comparative Analysis of 6T and 8T SRAM Cells with Improved Read and Write Margin is done for 130 nm Technology with Cadence Virtuoso schematics Tool.

Multi-Bit SRAMs, Registers, and Logic Using Quantum Well Channel SWS-FETs for Low-Power, High-Speed Computing

This paper presents novel multi-bit static random access memories (SRAMs) using spatial wave-function switched (SWS) FETs. A SWS-FET comprises of two or more vertically stacked quantum well channels while having a single gate and multiple sources and drains. Simulations are presented for 2-bit static random access memories (SRAMs) using cross-coupled 4-states SWS-CMOS inverters. The CMOS inverters are based on 4-state SWS FETs using two Si/SiGe quantum well channels. SWS-structures having 4-quantum well channels processing 8-states/3-bit are described. Logic simulation of multi-bit latches and registers is also presented. Multi-bit CMOS SWS-SRAMs and registers, integrated with logic, and quantum dot nonvolatile random access memories (QD-NVRAMs) presents a new paradigm for low power, high-speed computing.

Trusted Cameras on Mobile Devices Based on SRAM Physically Unclonable Functions

Nowadays, there is an increasing number of cameras placed on mobile devices connected to the Internet. Since these cameras acquire and process sensitive and vulnerable data in applications such as surveillance or monitoring, security is essential to avoid cyberattacks. However, cameras on mobile devices have constraints in size, computation and power consumption, so that lightweight security techniques should be considered. Camera identification techniques guarantee the origin of the data. Among the camera identification techniques, Physically Unclonable Functions (PUFs) allow generating unique, distinctive and unpredictable identifiers from the hardware of a device. PUFs are also very suitable to obfuscate secret keys (by binding them to the hardware of the device) and generate random sequences (employed as nonces). In this work, we propose a trusted camera based on PUFs and standard cryptographic algorithms. In addition, a protocol is proposed to protect the communication with the trusted camera, which satisfies authentication, confidentiality, integrity and freshness in the data communication. This is particularly interesting to carry out camera control actions and firmware updates. PUFs from Static Random Access Memories (SRAMs) are selected because cameras typically include SRAMs in its hardware. Therefore, additional hardware is not required and security techniques can be implemented at low cost. Experimental results are shown to prove how the proposed solution can be implemented with the SRAM of commercial Bluetooth Low Energy (BLE) chips included in the communication module of the camera. A proof of concept shows that the proposed solution can be implemented in low-cost cameras.