An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention

2021 ◽  
Author(s):  
Ning-Chi Huang ◽  
Wei-Kai Tseng ◽  
Huan-Jan Chou ◽  
Kai-Chiang Wu
Keyword(s):  
Systolic Array ◽  
Energy Efficient ◽  
Error Prediction ◽  
Timing Error ◽  
Prediction And Prevention

scholarly journals AN IN-SITU TIMING-ERROR PREDICTION AND PREVENTION TECHNIQUE FOR VARIATION-TOLERANT MAC-UNIT.

2017 ◽  
Vol 5 (7) ◽  
pp. 1772-1781
Author(s):  
Jasmer Singh ◽  
◽  
Saha K ◽  
GL Pahuja ◽  
◽  
...  
Keyword(s):  
Error Prediction ◽  
Timing Error ◽  
Prediction And Prevention

scholarly journals CLIM: A Cross-Level Workload-Aware Timing Error Prediction Model for Functional Units

2018 ◽  
Vol 67 (6) ◽  
pp. 771-783 ◽  
Author(s):  
Xun Jiao ◽  
Abbas Rahimi ◽  
Yu Jiang ◽  
Jianguo Wang ◽  
Hamed Fatemi ◽  
...  
Keyword(s):  
Prediction Model ◽  
Error Prediction ◽  
Timing Error ◽  
Functional Units

scholarly journals Algorithm Level Error Detection in Low Voltage Systolic Array

2021 ◽  
Author(s):  
Mehdi Safarpour
Keyword(s):  
Systolic Array ◽  
Error Detection ◽  
Energy Efficient ◽  
Low Voltage ◽  
Voltage Scaling ◽  
Energy Efficient Architecture ◽  
Algorithm Level

An energy efficient architecture for TPUs that is based on reduced voltage operation. The errors are captured and corrected by utilizing ABFT and hence aggressive voltage scaling is made possible.

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