Thermal Design Analysis of Free Space Optical Interconnect (FSOI) Package Module

Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee

Abstract A detailed thermal analysis for the FSOI (Free Space Optical Interconnect) technology incorporating VCSEL (Vertical Cavity Surface Emitting Laser) devices is performed using commercially available software. FSOI is one of the latest technologies used to transmit information at high-speed to/from a microprocessor to memory device via photons. Due to large heat dissipation and compact packaging design, temperature and associated thermal strain/stress could reach high values in the FSOI assembly, causing serious reliability and quality problems. Several design options are investigated in order to provide optimal thermal management for the FSOI module, and maintain VCSEL temperatures within reasonable limits. Convective cooling results for both organic and ceramic boards are investigated. For designs with organic boards and without any thermal enhancement, the VCSEL temperature is well above the acceptable limit of 85°C at an ambient temperature of 30°C. The sequential inclusion of pedestals, board thermal vias, conductive rings between the optical modules, and metallic (Al) rods will significantly enhance the module thermal performance and reduce VCSEL temperature to 46°C. The presence of thermal vias in the organic board is critical; however, if the copper area percentage in the via block vs. the die area is above 3%, the VCSEL temperatures will remain constant. The ceramic boards provide a good thermal solution, as VCSEL temperatures remain below the upper limit without including any thermal vias in the board. The comparison between the effect of convective air speed on FSOI with ceramic versus organic boards reveals that the VCSEL temperature is slightly higher (less than 2°C) for the case incorporating a ceramic board. However, the ceramic board has no thermal vias, compared to the 100% copper via block in the organic board. Hence, the same results are accomplished with much less complexity in the ceramic substrate design alternative. This option is suggested for manufacturing purposes, with improved thermal performances.

Author(s):  
Ping Gui ◽  
Fouad Kiamilev ◽  
Xiaoqing Wang ◽  
Michael McFadden ◽  
Charlie Kuznia ◽  
...  

Double data rate (DDR) signaling is widely used in electrical interconnects to eliminate clock recovery and to double communication bandwidth. This paper describes the design of a parallel optical transceiver integrated circuit (IC) that uses source-synchronous, DDR optical signaling. On the transmit side, two 8-bit electrical inputs are multiplexed, encoded and sent over two high-speed optical links. On the receive side, the procedure is reversed to produce two 8-bit electrical outputs. Our IC integrates analog Vertical Cavity Surface Emitting Lasers (VCSEL), drivers and optical receivers with digital DDR multiplexing, serialization, and deserializaton circuits. It was fabricated in a 0.5-micron Silicon-on-Sapphire (SOS) CMOS process. Linear arrays of quad VCSELs and photodetectors were attached to our transceiver IC using flip-chip bonding. A free-space optical link system was constructed to demonstrate correct IC functionality. The test results show successful transceiver operation at a data rate of 500 Mbps with a 250 MHz DDR clock, achieving a gigabit of aggregate bandwidth. While our DDR scheme is well suited for low-skew fiber-ribbon, free-space and waveguide optical links, it can also be extended to links with higher skew with the addition of skew-compensation circuitry. To our knowledge, this is the first demonstration of parallel optical transceivers that use source-synchronous DDR signaling.


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