Fuzzy Logic-Based DSE Engine: Reconfiguration for Optimization of Multicore Architectures

2016 ◽  
Vol 25 (12) ◽  
pp. 1650160
Author(s):  
Iqra Farhat ◽  
Muhammad Yasir Qadri ◽  
Nadia N. Qadri ◽  
Jameel Ahmed

Moore’s law has been one of the reason behind the evolution of multicore architectures. Modern multicore architectures offer great amount of parallelism and on-chip resources that remain underutilized. This is partly due to inefficient resource allocation by operating system or application being executed. Consequently the poor resource utilization results in greater energy consumption and less throughput. This paper presents a fuzzy logic-based design space exploration (DSE) approach to reconfigure a multicore architecture according to workload requirements. The target design space is explored for L1 and L2 cache size and associativity, operating frequency, and number of cores, while the impact of various configurations of these parameters is analyzed on throughput, miss ratios for L1 and L2 cache and energy consumption. MARSSx86, a cycle accurate simulator, running various SPALSH-2 benchmark applications has been used to evaluate the architecture. The proposed fuzzy logic-based DSE approach resulted in reduction in energy consumption along with an overall improved throughput of the system.

Author(s):  
Ram Prasad Mohanty ◽  
Ashok Kumar Turuk ◽  
Bibhudatta Sahoo

The growing number of cores increases the demand for a powerful memory subsystem which leads to enhancement in the size of caches in multicore processors. Caches are responsible for giving processing elements a faster, higher bandwidth local memory to work with. In this chapter, an attempt has been made to analyze the impact of cache size on performance of Multi-core processors by varying L1 and L2 cache size on the multicore processor with internal network (MPIN) referenced from NIAGRA architecture. As the number of core's increases, traditional on-chip interconnects like bus and crossbar proves to be low in efficiency as well as suffer from poor scalability. In order to overcome the scalability and efficiency issues in these conventional interconnect, ring based design has been proposed. The effect of interconnect on the performance of multicore processors has been analyzed and a novel scalable on-chip interconnection mechanism (INOC) for multicore processors has been proposed. The benchmark results are presented by using a full system simulator. Results show that, using the proposed INoC, compared with the MPIN; the execution time are significantly reduced.


Author(s):  
Nicolas Albarello ◽  
Jean-Baptiste Welcomme

The design of systems architectures often involve a combinatorial design-space made of technological and architectural choices. A complete or large exploration of this design space requires the use of a method to generate and evaluate design alternatives. This paper proposes an innovative approach for the design-space exploration of systems architectures. The SAMOA (System Architecture Model-based OptimizAtion) tool associated to the method is also introduced. The method permits to create a large number of various system architectures combining a set of possible components to address given system functions. The method relies on models that are used to represent the problem and the solutions and to evaluate architecture performances. An algorithm first synthesizes design alternatives (a physical architecture associated to a functional allocation) based on the functional architecture of the system, the system interfaces, a library of available components and user-defined design rules. Chains of components are sequentially added to an initially empty architecture until all functions are fulfilled. The design rules permit to guarantee the viability and validity of the chains of components and, consequently, of the generated architectures. The design space exploration is then performed in a smart way through the use of an evolutionary algorithm, the evolution mechanisms of which are specific to system architecting. Evaluation modules permit to assess the performances of alternatives based on the structure of the architecture model and the data embedded in the component models. These performances are used to select the best generated architectures considering constraints and quality metrics. This selection is based on the Pareto-dominance-based NSGA-II algorithm or, alternatively, on an interactive preference-based algorithm. Iterating over this evolution-evaluation-selection process permits to increase the quality of solutions and, thus, to highlight the regions of interest of the design-space which can be used as a base for further manual investigations. By using this method, the system designers have a larger confidence in the optimality of the adopted architecture than using a classical derivative approach as many more solutions are evaluated. Also, the method permits to quickly evaluate the trade-offs between the different considered criteria. Finally, the method can also be used to evaluate the impact of a technology on the system performances not only by a substituting a technology by another but also by adapting the architecture of the system.


Author(s):  
Pablo Bellocq ◽  
Inaki Garmendia ◽  
Jordane Legrand ◽  
Vishal Sethi

Direct Drive Open Rotors (DDORs) have the potential to significantly reduce fuel consumption and emissions relative to conventional turbofans. However, this engine architecture presents many design and operational challenges both at engine and aircraft level. At preliminary design stages, a broad design space exploration is required to identify potential optimum design regions and to understand the main trade offs of this novel engine architecture. These assessments may also aid the development process when compromises need to be performed as a consequence of design, operational or regulatory constraints. Design space exploration assessments are done with 0-D or 1-D models for computational purposes. These simplified 0-D and 1-D models have to capture the impact of the independent variation of the main design and control variables of the engine. Historically, it appears that for preliminary design studies of DDORs, Counter Rotating Turbines (CRTs) have been modelled as conventional turbines and therefore it was not possible to assess the impact of the variation of the number of stages (Nb) of the CRT and rotational speed of the propellers. Additionally, no preliminary design methodology for CRTs was found in the public domain. Part I of this two-part publication proposes a 1-D preliminary design methodology for DDOR CRTs which allows an independent definition of both parts of the CRT. A method for calculating the off-design performance of a known CRT design is also described. In Part II, a 0-D design point efficiency calculation for CRTs is proposed and verified with the 1-D methods. The 1-D and 0-D CRT models were used in an engine control and design space exploration case study of a DDOR with a 4.26m diameter an 10% clipped propeller for a 160 PAX aircraft. For this application: • the design and performance of a 20 stage CRT rotating at 860 rpm (both drums) obtained with the 1-D methods is presented. • differently from geared open rotors, negligible cruise fuel savings can be achieved by an advanced propeller control. • for rotational speeds between 750 and 880 rpm (relatively low speeds for reduced noise), 22 and 20 stages CRTs are required. • engine weight can be kept constant for different design rotational speeds by using the minimum required Nb. • for any target engine weight, TOC and cruise SFC are reduced by reducing the rotational speeds and increasing Nb (also favourable for reducing CRP noise). However additional CRT stages increase engine drag, mechanical complexity and cost.


Sign in / Sign up

Export Citation Format

Share Document