Secure Communications Based on Variable Topology of Chaotic Circuits

A new technique for synchronization of chaotic circuits is proposed. This technique, based on varying a circuit's overall topology rather than varying a set of continuous parameters, offers a possible resolution to the tradeoff between security and synchronizability inherent in existing chaotic systems. The encryption key is represented by a mapping from a set of nodes to a set of switches in the circuit. This method significantly improves reliability and can be easily interfaced to digital control circuits.

Download Full-text

A New Technique for Multirate Digital Control Design and Sample Rate Selection

Journal of Guidance Control and Dynamics ◽

10.2514/3.56185 ◽

1982 ◽

Vol 5 (4) ◽

pp. 379-382 ◽

Cited By ~ 23

Author(s):

Douglas P. Glasson

Keyword(s):

Digital Control ◽

Control Design ◽

New Technique ◽

Sample Rate ◽

Rate Selection ◽

A New Technique

Download Full-text

A New Technique In Drive And Control Circuits For Power Electronic Systems

10.1117/12.942978 ◽

1987 ◽

Cited By ~ 1

Author(s):

Fernando Yeves ◽

Julio delValle ◽

Juan Peire ◽

Fernando Aldana

Keyword(s):

New Technique ◽

Electronic Systems ◽

Power Electronic ◽

Control Circuits ◽

A New Technique ◽

Drive And Control ◽

And Control

Download Full-text

Picosecond Imaging Circuit Analysis of the IBM G6 Microprocessor Cache

ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa1999p0035 ◽

1999 ◽

Author(s):

Moyra McManus ◽

Pia Sanda ◽

Steven Steen ◽

Dan Knebel ◽

Dennis Manzer ◽

...

Keyword(s):

Circuit Analysis ◽

Vlsi Circuits ◽

New Technique ◽

High Frequencies ◽

Early Design ◽

Race Condition ◽

Self Test ◽

Built In Self Test ◽

Control Circuits ◽

A New Technique

Abstract Picosecond Imaging Circuit Analysis (PICA) is a new technique shown here to be applicable to the analysis of complex VLSI circuits. PICA was used to diagnose a timing failure in the early design of the G6 microprocessor chip. The fault occurred at high frequencies upon consecutive writes. Using PICA, combined with programmable array built-in self test (RAMBIST) techniques, the problem was traced to a race condition in the write control circuits. This allowed timely correction of the design for product implementation.

Download Full-text