Picosecond Imaging Circuit Analysis of the IBM G6 Microprocessor Cache

1999 ◽  
Author(s):  
Moyra McManus ◽  
Pia Sanda ◽  
Steven Steen ◽  
Dan Knebel ◽  
Dennis Manzer ◽  
...  
Keyword(s):  
Circuit Analysis ◽  
Vlsi Circuits ◽  
New Technique ◽  
High Frequencies ◽  
Early Design ◽  
Race Condition ◽  
Self Test ◽  
Built In Self Test ◽  
Control Circuits ◽  
A New Technique

Abstract Picosecond Imaging Circuit Analysis (PICA) is a new technique shown here to be applicable to the analysis of complex VLSI circuits. PICA was used to diagnose a timing failure in the early design of the G6 microprocessor chip. The fault occurred at high frequencies upon consecutive writes. Using PICA, combined with programmable array built-in self test (RAMBIST) techniques, the problem was traced to a race condition in the write control circuits. This allowed timely correction of the design for product implementation.

scholarly journals Syndrome Signature in Output Compaction for VLSI Built-in Self-Test

VLSI Design ◽  
1998 ◽  
Vol 7 (2) ◽  
pp. 191-201
Author(s):  
Sunil R. Das ◽  
Nita Goel ◽  
Wen B. Jone ◽  
Amiya R. Nayak
Keyword(s):  
Fault Detection ◽  
Vlsi Circuits ◽  
Internal Line ◽  
Single Output ◽  
Signature Generation ◽  
Self Testing ◽  
Vlsi Technology ◽  
Self Test ◽  
Built In Self Test

In this paper, we focus on the use of signature-based output compaction technique for built-in self-testing of VLSI circuits. We give algorithm for single-output and multiple-output signature generation using exhaustive test patterns extending the syndrome conccpt. The signature wc develop is a functional signature and is very effective for both input and internal line fault detection, as seen from simulation on various benchmark circuits. The signature generators can bc easily implemented using the current VLSI technology.

Secure Communications Based on Variable Topology of Chaotic Circuits

1997 ◽  
Vol 07 (12) ◽  
pp. 2861-2869 ◽  
Author(s):  
Alexander A. Alexeyev ◽  
Michael M. Green
Keyword(s):  
Digital Control ◽  
Chaotic Systems ◽  
New Technique ◽  
Secure Communications ◽  
Variable Topology ◽  
Chaotic Circuits ◽  
Control Circuits ◽  
A New Technique

A new technique for synchronization of chaotic circuits is proposed. This technique, based on varying a circuit's overall topology rather than varying a set of continuous parameters, offers a possible resolution to the tradeoff between security and synchronizability inherent in existing chaotic systems. The encryption key is represented by a mapping from a set of nodes to a set of switches in the circuit. This method significantly improves reliability and can be easily interfaced to digital control circuits.

Modeling Mechanical Stick-Slip Friction Using Electrical Circuit Analysis

1988 ◽  
Vol 110 (4) ◽  
pp. 440-443 ◽  
Author(s):  
Paul J. Kolston
Keyword(s):  
Mechanical System ◽  
Mechanical Systems ◽  
Electrical Circuit ◽  
Circuit Analysis ◽  
New Technique ◽  
Analysis Program ◽  
Stick Slip ◽  
A New Technique ◽  
Vast Range

A new technique for modeling stick-slip friction in mechanical systems is proposed. The technique uses an electrical circuit analysis program to analyze the electrical circuit equivalent of the mechanical system. The stick-slip characteristic can be altered to take almost any form. The method is easy to apply to a vast range of systems, and two examples are given to illustrate its validity.

scholarly journals Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs

VLSI Design ◽  
2010 ◽  
Vol 2010 ◽  
pp. 1-12 ◽  
Author(s):  
Reza Hashemian
Keyword(s):  
Analog Circuits ◽  
Analog Circuit ◽  
Linear Models ◽  
Circuit Analysis ◽  
New Technique ◽  
A New Technique ◽  
Nonlinear Components ◽  
Operating Points

A new technique is presented for biasing of analog circuits. The biasing design begins with local biasing of the nonlinear components (transistors), done according to the pre-specified operating points (OPs) and for the best performance of the circuit. Next, the transistors are replaced with their linear models to perform the AC design. Upon finishing with the AC design we need to move from the local biasing to global (normal) biasing while the OPs are kept unchanged. Here fixators—nullators plus sources—are shown to be very instrumental and with norators—as the place holders for the DC supplies in the circuit—they make pairs. The solution of the circuit so prepared provides the DC supplies at the designated locations in the circuit. The rules to engage in circuit analysis with fixator-norator pairs are discussed, and numerous pitfalls in this line are specified. Finally, two design examples are worked out that clearly demonstrate the capability and power of the proposed technique for biasing any analog circuit.

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