High-Performance Strain-Compensated Multiple Quantum Well Planar Buried Heterostructure Laser Diodes with Low Leakage Current

1996 ◽  
Vol 35 (Part 1, No. 3) ◽  
pp. 1751-1757 ◽  
Author(s):  
Ho Sung Cho ◽  
Dong Hoon Jang ◽  
Jung Kee Lee ◽  
Kyung Hyun Park ◽  
Jeong Soo Kim ◽  
...  
1988 ◽  
Vol 24 (23) ◽  
pp. 1408 ◽  
Author(s):  
T. Sasaki ◽  
S. Takano ◽  
N. Henmi ◽  
H. Yamada ◽  
M. Kitamura ◽  
...  

1988 ◽  
Vol 24 (16) ◽  
pp. 1045 ◽  
Author(s):  
M. Kitamura ◽  
S. Takano ◽  
N. Henmi ◽  
T. Sasaki ◽  
H. Yamada ◽  
...  

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.


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