Comparison of MOCVD and MBE Regrowth for CAVET Fabrication

In this paper, we demonstrate the fabrication of current aperture vertical electron transistors (CAVET) realized with two different epitaxial growth methods. Templates with a p-GaN current blocking layer (CBL) were deposited by metal organic chemical vapor deposition (MOCVD). Channel and barrier layers were then regrown by either molecular beam epitaxy (MBE) or MOCVD. Scanning electron microscope (SEM) images and atomic force microscope (AFM) height profiles are used to identify the different regrowth mechanisms. We show that an AlN interlayer below the channel layer was able to reduce Mg diffusion during the high temperature MOCVD regrowth process. For the low-temperature MBE regrowth, Mg diffusion was successfully suppressed. CAVET were realized on the various samples. The devices suffer from high leakage currents, thus further regrowth optimization is needed.

Gallium Nitride Normally-Off Vertical Field-Effect Transistor Featuring an Additional Back Current Blocking Layer Structure

A gallium nitride (GaN) semiconductor vertical field-effect transistor (VFET) has several attractive advantages such as high power density capability and small device size. Currently, some of the main issues hindering its development include the realization of normally off operation and the improvement of high breakdown voltage (BV) characteristics. In this work, a trenched-gate scheme is employed to realize the normally off VFET. Meanwhile, an additional back current blocking layer (BCBL) is proposed and inserted into the GaN normally off VFET to improve the device performance. The electrical characteristics of the proposed device (called BCBL-VFET) are investigated systematically and the structural parameters are optimized through theoretical calculations and TCAD simulations. We demonstrate that the BCBL-VFET exhibits a normally off operation with a large positive threshold voltage of 3.5 V and an obviously increased BV of 1800 V owing to the uniform electric field distribution achieved around the gate region. However, the device only shows a small degradation of on-resistance (RON). The proposed scheme provides a useful reference for engineers in device fabrication work and will be promising for the applications of power electronics.